參數(shù)資料
型號(hào)： ST72141K2B3/XXX
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32
封裝： 0.400 INCH, PLASTIC, SDIP-32
文件頁(yè)數(shù)： 78/133頁(yè)
文件大?。?/td> 2615K
代理商： ST72141K2B3/XXX
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Obsolete
Product(s)
- Obsolete
Product(s)
ST72141K2
49/133
MOTOR CONTROLLER (Cont’d)
BEMF Zero Crossing (Z) Event
When both C and D events have occurred, the
PWM may be switched to another group of outputs
(depending on the OS[2:0] bits in the MCRB regis-
ter) and the real BEMF zero crossing sampling can
start (see Figure 32).
A BEMF voltage is present on the non-powered
terminal but referred to common star connection of
the motor whose voltage is equal to VDD/2.
When a winding is free-wheeling (during PWM off-
time) its terminal voltage changes to the other
power rail voltage, that means if the PWM is ap-
plied on the high side driver, free-wheeling will be
done through the high side diode and the terminal
will be 0V.
This is used to force the common star connection
to 0V in order to read the BEMF referred to the
ground terminal.
Consequently, BEMF reading (i.e. comparison
with a voltage close to 0V) can only be done when
the PWM is applied on the high side drivers.
For this reason the MTC outputs can be split in two
groups called ODD and EVEN and the BEMF
reading will be done only when PWM is applied on
one of these two groups. The REO bit in the MPAR
register is used to select the group to be used for
BEMF sensing (high side group)
Refer to Table 16 for an overview of when a BEMF
can be read depending on REO bit, PWM mode
and function mode of peripheral.
Depending on the edge and level selection (ZVD
and CPB) bits and when PWM is applied on the
correct group, a BEMF zero crossing detection
sets the ZI bit in the MISR register and generates
an interrupt if the ZIM bit is set.
The Z event also triggers some timer/multiplier op-
erations, for more details see Section 8.1.4.2
Figure 31. Sampling and Zero Crossing Blocks
Output of hysteresis comparator
DQ
CP
1
2
V
I
16-bit Timer PWM
Sampling frequency
V0C1 bit
Freq. (T=1.25us) for Demagnetization and Sensor
Sample
C
DS,H
1
2
20
μs / D
REO bit
C
DS,H
Sample
Z
SR bit
To D detection
ZVD bit
or
CPBn bit*
* = Preload register, changes taken into account at next C event.
MCRA Register
MPAR Register
MCRB Register MPAR Register
MCRA Register
Reg
C
DS,H
Z
events:
Commutation
BEFM Zero-crossing
End Of Demagnetization
E
Emergency Stop
Notes:
Updated/Shifted on R
Ratio Updated (+1 or -1)
Multiplier Overflow
R+/-
O
Current Mode
Voltage Mode
I
V
Regn
Updated with Regn+1 on C
1
2
Branch taken after C event
Branch taken after D event
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