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參數(shù)資料
| 型號： | ST6G3238ETBR |
| 廠商： | 意法半導體 |
| 英文描述： | Dual Supply Level Translator for SD/ MINISD/ T-FLASH With 【8KV Contact Discharge ESD Protection |
| 中文描述： | 雙電源電平轉(zhuǎn)換為SD / MiniSD卡/噸，閃光8kV接觸放電ESD保護與【 |
| 文件頁數(shù)： | 5/17頁 |
| 文件大?。?/td> | 199K |
| 代理商： | ST6G3238ETBR |
ST6G3238E
Pin Connection and Function
5/17
2.1
Pin Function
●
CMD, Command is a bi-directional line. The host and card drivers are operating in push-
pull.
DAT0-3, Data lines are bi-directional lines. The host and the card drivers are operating in
push-pull mode.
CLK, Clock is a host to card signal. CLK operates in push-pull mode.
Feedback (return) Clock is feedback clock signal from level shifter to host for controlling
delays.
CD, Card detect, pulls HIGH state of input to V
CCA
. This pin is protected against ESD up to
8kV contact.
WP, Write protect, pulls HIGH state of input to V
CCA
. This pin is protected against ESD up
to 8kV contact.
●
●
●
●
●
Table 3.
Pin Description
μ
TFBGA Pin N° TSSOP Pin N°
Type
Side
Symbol
Name and Function
A2
3
I
A-side
CMD-dir
Command direction
HIGH = A to B
LOW = B to A
D2
4
I/O
A-side
CMD.h
A-side Command
D4
22
I/O
B-Side
CMD
B-side Command
A3
1
I
A-Side
DAT0-dir
Data Direction
HIGH = A to B (write)
LOW = B to A (read)
D1
5
I/O
A-Side
DAT0.h
Data Input / Output
D5
21
I/O
B-Side
DAT0
Data Input / Output
E3
15
I
A-Side
DAT123-dir
Data Direction
HIGH = A to B (write)
LOW = B to A (read)
E1
6
I/O
A-Side
DAT1.h
Data Input / Output
A1
7
I/O
A-Side
DAT2.h
Data Input / Output
B1
8
I/O
A-Side
DAT3.h
Data Input / Output
E5
20
I/O
B-Side
DAT1
Data Input / Output
A5
19
I/O
B-Side
DAT2
Data Input / Output
B5
18
I/O
B-Side
DAT3
Data Input / Output
C1
10
I
A-Side
CLK.h
Clock Input
C5
17
O
B-Side
CLK
Clock Output
E2
9
O
A-Side
CLK-f
Clock Feedback
D3
23
-
A-Side
CD
Card Detect
E4
16
-
A-Side
WP
Write Protect
B3
2
-
A-Side
V
CCA
V
CCB
GND
Power supply
B4
24
-
B-Side
Power supply
C3, C4
11, 14
-
-
Ground (0V)
A4, B2, C2
12, 13
-
-
NC
No connect
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