參數(shù)資料
型號: ST62E60B
廠商: 意法半導(dǎo)體
英文描述: 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, AUTO-RELOAD TIMER, EEPROM AND SPI
中文描述: 8位檢察官辦公室/存儲器與阿微控制器/ D轉(zhuǎn)換器,自動重加載定時器,EEPROM和的SPI
文件頁數(shù): 43/75頁
文件大?。?/td> 540K
代理商: ST62E60B
43/75
ST62T53B/T60B/T63B ST62E60B
AUTO-RELOAD TIMER
(Cont’d)
It should be noted that the reload values will also
affect the value and the resolution of the duty cycle
of PWM output signal. To obtain a signal on ARTI-
Mout, the contents of the ARCP register must be
greater than the contents of the ARRC register.
The maximum available resolution for the ARTI-
Mout duty cycle is:
Resolution = 1/[255-(ARRC)]
Where ARRC is the content ofthe Reload/Capture
register. The compare value loaded in the Com-
pare Register, ARCP, must be in the range from
(ARRC) to 255.
The ARTC counter is initialized by writing to the
ARRC register and by then setting the TCLD (Tim-
er Load) and the TEN (Timer Clock Enable) bits in
the Mode Control register, ARMC.
Enabling and selection of the clock source is con-
trolled by the CC0, CC1, SL0 and SL1 bits in the
Status Control Register, ARSC1. The prescaler di-
vision ratio is selected by the PS0, PS1 and PS2
bits in the ARSC1 register.
In Auto-reload Mode, any of the three available
clock sources can be selected: Internal Clock, In-
ternal Clock divided by 3 or the clock signal
present on the ARTIMin pin.
Figure 25. . Auto-reload Timer PWM Function
COUNTER
COMPARE
VALUE
RELOAD
REGISTER
PWM OUTPUT
t
t
255
000
VR001852
43
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