參數(shù)資料
型號: ST6240B
廠商: 意法半導體
英文描述: Replaced by PT6302 : 5Vout 3A Wide Input Positive Step-Down ISR 3-SIP MODULE -40 to 70
中文描述: 8位檢察官辦公室/存儲器與LCD驅(qū)動器,EEPROM和一個微處理器/ D轉(zhuǎn)換器
文件頁數(shù): 58/76頁
文件大?。?/td> 1280K
代理商: ST6240B
58/76
ST62T40B/E40B
INSTRUCTION SET
(Cont’d)
Conditional Branch
. The branch instructions
achieve a branch in the program when the select-
ed condition is met.
Bit Manipulation Instructions
. These instruc-
tions can handle any bit in data space memory.
One group either sets or clears. The other group
(see Conditional Branch) performs the bit test
branch operations.
Table 28. Conditional Branch Instructions
Control Instructions
. The control instructions
control the MCU operations during program exe-
cution.
Jump and Call.
These two instructions are used
to perform long (12-bit) jumps or subroutines call
inside the whole program space.
Notes
:
b.
e.
ee.
Table 29. Bit Manipulation Instructions
3-bit address
5 bit signed displacement in the range -15 to +16<F128M>
8 bit signed displacement in the range -126 to +129
rr. Data space register
. Affected. The tested bit is shifted into carry.
* . Not Affected
Notes:
b.
rr.
3-bit address;
Data space register;
* . Not<M> Affected
Table 30. Control Instructions
Notes:
1.
.
*.
This instruction is deactivated<N>and a WAIT is automatically executed instead of a STOP if the watchdog function is selected.
Affected
Not Affected
Table 31. Jump & Call Instructions
Instruction
Notes:
abc. 12-bit address;
* .
Not Affected
Instruction
Branch If
Bytes
Cycles
Flags
Z
*
*
*
*
*
*
C
*
*
*
*
JRC e
JRNC e
JRZ e
JRNZ e
JRR b, rr, ee
JRS b, rr, ee
C = 1
C = 0
Z = 1
Z = 0
Bit = 0
Bit = 1
1
1
1
1
3
3
2
2
2
2
5
5
Instruction
Addressing Mode
Bytes
Cycles
Flags
Z
*
*
C
*
*
SET b,rr
RES b,rr
Bit Direct
Bit Direct
2
2
4
4
Instruction
Addressing Mode
Bytes
Cycles
Flags
Z
*
*
*
*
C
*
*
*
*
NOP
RET
RETI
STOP (1)
WAIT
Inherent
Inherent
Inherent
Inherent
Inherent
1
1
1
1
1
2
2
2
2
2
Addressing Mode
Bytes
Cycles
Flags
Z
*
*
C
*
*
CALL abc
JP abc
Extended
Extended
2
2
4
4
630
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