- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383837 > ST16C552 (Exar Corporation) Dual UART with 16-Byte FIFO and Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出和并行打印機(jī)端口）) PDF資料下載
參數(shù)資料
| 型號(hào)： | ST16C552 |
| 廠商： | Exar Corporation |
| 英文描述： | Dual UART with 16-Byte FIFO and Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出和并行打印機(jī)端口）) |
| 中文描述： | 雙UART），16字節(jié)FIFO和并行打印機(jī)端口（雙通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出和并行打印機(jī)端口） |
| 文件頁數(shù)： | 19/40頁 |
| 文件大?。?/td> | 463K |
| 代理商： | ST16C552 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
19
ST16C552/552A
Rev. 3.30
IER BIT 6-7:
Not Used - initialized to a logic 0.
FIFO Control Register (FCR)
This register is used to enable the FIFOs, clear the
FIFOs, set the receive FIFO trigger levels, and select
the DMA mode. The DMA, and FIFO modes are
defined as follows:
DMA MODE
Mode 0
single transmit or receive operation, and is similar to
the ST16C450 mode. Transmit Ready (-TXRDY) will
go to a logic 0 when ever an empty transmit space is
available in the Transmit Holding Register (THR).
Receive Ready (-RXRDY) will go to a logic 0 when-
ever the Receive Holding Register (RHR) is loaded
with a character.
Mode 1
Set and enable the interrupt in a block
mode operation. The transmit interrupt is set when the
transmit FIFO is below the programmed trigger level.
-TXRDY remains a logic 0 as long as one empty FIFO
location is available. The receive interrupt is set when
the receive FIFO fills to the programmed trigger level.
However the FIFO continues to fill regardless of the
programmed level until the FIFO is full. -RXRDY
remains a logic 0 as long as the FIFO fill level is above
the programmed trigger level.
Set and enable the interrupt for each
FCR BIT-0:
Logic 0 = Disable the transmit and receive FIFO.
(normal default condition)
Logic 1 = Enable the transmit and receive FIFO. This
bit must be a 1 when other FCR bits are written to or
they will not be programmed.
FCR BIT-1:
Logic 0 = No FIFO receive reset. (normal default
condition)
Logic 1 = Clears the contents of the receive FIFO and
resets the FIFO counter logic (the receive shift regis-
ter is not cleared or altered). This bit will return to a
logic 0 after clearing the FIFO.
FCR BIT-2:
Logic 0 = No FIFO transmit reset. (normal default
condition)
Logic 1 = Clears the contents of the transmit FIFO and
resets the FIFO counter logic (the transmit shift regis-
ter is not cleared or altered). This bit will return to a
logic 0 after clearing the FIFO.
FCR BIT-3:
Logic 0 = Set DMA mode 0. (normal default condi-
tion)
Logic 1 = Set DMA mode 1.
Transmit operation in mode 0:
When the 552/552A is in the ST16C450 mode (FIFOs
disabled, FCR bit-0 = logic 0) or in the FIFO mode
(FIFOs enabled, FCR bit-0 = logic 1, FCR bit-3 = logic
0) and when there are no characters in the transmit
FIFO or transmit holding register, the -TXRDY pin will
be a logic 0. Once active the -TXRDY pin will go to a
logic 1 after the first character is loaded into the
transmit holding register.
Receive operation in mode 0:
When the 552/552A is in mode 0 (FCR bit-0 = logic
0) or in the FIFO mode (FCR bit-0 = logic 1, FCR bit-
3 = logic 0) and there is at least one character in the
receive FIFO, the -RXRDY pin will be a logic 0. Once
active the -RXRDY pin will go to a logic 1 when there
are no more characters in the receiver.
Transmit operation in mode 1:
When the 552/552A is in FIFO mode ( FCR bit-0 =
logic 1, FCR bit-3 = logic 1 ), the -TXRDY pin will be
a logic 1 when the transmit FIFO is completely full. It
will be a logic 0 if one or more FIFO locations are
empty.
Receive operation in mode 1:
When the 552/552A is in FIFO mode (FCR bit-0 = logic
1, FCR bit-3 = logic 1) and the trigger level has been
reached, or a Receive Time Out has occurred, the -
RXRDY pin will go to a logic 0. Once activated, it will
go to a logic 1 after there are no more characters in the
FIFO.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST16C552A | Dual UART with 16-Byte FIFO and Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出和并行打印機(jī)端口）) |
| ST16C554DCJ68 | QUAD UART WITH 16-BYTE FIFOS |
| ST68C554 | QUAD UART WITH 16-BYTE FIFOS |
| ST16C554DIJ68 | Plug-In Relay; Contacts:DPDT; Contact Carry Current:15A; Coil Voltage AC Max:120V; Relay Mounting:Plug-In; Relay Terminals:Quick Connect; Coil Resistance:4430ohm RoHS Compliant: Yes |
| ST16C554DIQ64 | QUAD UART WITH 16-BYTE FIFOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C552ACJ68 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| ST16C552ACJ68-F | 功能描述:UART 接口集成電路 DUAL UART W/16BYTE FIFO&PARALELPRNTPORT RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C552ACJ68TR-F | 功能描述:UART 接口集成電路 DUAL UART W/16BYTE FIFO&PARALELPRNTPORT RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C552AIJ68 | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH 16-BYTE FIFO AND PARALLEL PRINTER PORT |
| ST16C552AIJ68-F | 功能描述:UART 接口集成電路 DUAL UART W/16BYTE FIFO&PARALELPRNTPORT RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。