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參數(shù)資料
| 型號： | ST16C454 |
| 廠商： | Exar Corporation |
| 英文描述： | QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART) |
| 中文描述： | 四通用異步接收/發(fā)送器（UART） |
| 文件頁數(shù)： | 15/30頁 |
| 文件大?。?/td> | 378K |
| 代理商： | ST16C454 |
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ST16C454/68C454
15
Rev. 3.20
Transmit (THR) and Receive (RHR) Holding Reg-
isters
The serial transmitter section consists of an 8-bit
Transmit Hold Register (THR) and Transmit Shift
Register (TSR). The status of the THR is provided in
the Line Status Register (LSR). Writing to the THR
transfers the contents of the data bus (D7-D0) to the
THR, providing that the THR or TSR is empty. The
THR empty flag in the LSR register will be set to a logic
1 when the transmitter is empty or when data is
transferred to the TSR. Note that a write operation can
be performed when the transmit holding register
empty flag is set.
The serial receive section also contains an 8-bit
Receive Holding Register, RHR. Receive data is
removed from the 454 by reading the RHR register.
The receive section provides a mechanism to prevent
false starts. On the falling edge of a start or false start
bit, an internal receiver counter starts counting clocks
at 16x clock rate. After 7 1/2 clocks the start bit time
should be shifted to the center of the start bit. At this
time the start bit is sampled and if it is still a logic 0 it
is validated. Evaluating the start bit in this manner
prevents the receiver from assembling a false charac-
ter. Receiver status codes will be posted in the LSR.
Interrupt Enable Register (IER)
The Interrupt Enable Register (IER) masks the inter-
rupts from receiver ready, transmitter empty, line
status and modem status registers. These interrupts
would normally be seen on the INT A-D output pins in
the 16 mode, or on WIRE-OR IRQ output pin, in the 68
mode.
IER BIT-0:
This interrupt will be issued when the RHR is full,
cleared when the RHR is empty.
Logic 0 = Disable the receiver ready interrupt. (normal
default condition)
Logic 1 = Enable the receiver ready interrupt.
IER BIT-1:
This interrupt will be issued whenever the THR is
empty and is associated with bit-1 in the LSR register.
Logic 0 = Disable the transmitter empty interrupt.
(normal default condition)
Logic 1 = Enable the transmitter empty interrupt.
IER BIT-2:
This interrupt will be issued whenever a fully as-
sembled receive character is transferred from the
RSR to the RHR, data ready, LSR bit-0.
Logic 0 = Disable the receiver line status interrupt.
(normal default condition)
Logic 1 = Enable the receiver line status interrupt.
IER BIT-3:
Logic 0 = Disable the modem status register interrupt.
(normal default condition)
Logic 1 = Enable the modem status register interrupt.
IER BIT 4-7:
Not used - Initialized to a logic 0.
Interrupt Status Register (ISR)
The 454 provides four levels of prioritized interrupts to
minimize external software interaction. The Interrupt
Status Register (ISR) provides the user with six inter-
rupt status bits. Performing a read cycle on the ISR will
provide the user with the highest pending interrupt
level to be serviced. No other interrupts are acknowl-
edged until the pending interrupt is serviced. When-
ever the interrupt status register is read, the interrupt
status is cleared. However it should be noted that only
the current pending interrupt is cleared by the read. A
lower level interrupt may be seen after rereading the
interrupt status bits. The Interrupt Source Table 7
(below) shows the data values (bit 0-5) for the four
prioritized interrupt levels and the interrupt sources
associated with each of these interrupt levels:
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST16C454CJ68 | QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART) |
| ST16C454IJ68 | QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART) |
| ST68C454 | QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART) |
| ST16C550CQ48 | UART WITH 16-BYTE FIFO’s |
| ST16C550IJ44 | UART WITH 16-BYTE FIFO’s |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C454_05 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART) |
| ST16C454CJ | 制造商:Exar Corporation 功能描述: |
| ST16C454CJ-0A-EVB | 功能描述:界面開發(fā)工具 Supports C454 68 ld PLCC, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| ST16C454CJ68 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| ST16C454CJ68-F | 功能描述:UART 接口集成電路 QUAD UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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