- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1969 > ST16C2552IJ44TR-F (Exar Corporation)IC UART FIFO 16B DUAL 44PLCC PDF資料下載
參數(shù)資料
| 型號： | ST16C2552IJ44TR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 13/34頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 16B DUAL 44PLCC |
| 標準包裝： | 500 |
| 特點： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 16 字節(jié) |
| 規(guī)程： | RS232，RS485 |
| 電源電壓： | 3.3 V ~ 5 V |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
ST16C2552
20
2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
REV. 4.2.2
4.7
Line Control Register (LCR) - Read/Write
The Line Control Register is used to specify the asynchronous data communication format. The word or
character length, the number of stop bits, and the parity are selected by writing the appropriate bits in this
register.
LCR[1:0]: TX and RX Word Length Select
These two bits specify the word length to be transmitted or received.
WORD LENGTH
0
5 (default)
0
1
6
1
0
7
1
8
LCR[2]: TX and RX Stop-bit Length Select
The length of stop bit is specified by this bit in conjunction with the programmed word length.
WORD
LENGTH
STOP BIT LENGTH
(BIT TIME(S))
0
5,6,7,8
1 (default)
1
5
1-1/2
1
6,7,8
2
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See Table 10 for parity selection summary below.
Logic 0 = No parity.
Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
LCR[4]: TX and RX Parity Select
If the parity bit is enabled with LCR bit-3 set to a logic 1, LCR BIT-4 selects the even or odd parity format.
Logic 0 = ODD Parity is generated by forcing an odd number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format (default).
Logic 1 = EVEN Parity is generated by forcing an even number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format.
BIT-1
BIT-0
BIT-2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST16C450CJ44-F | IC UART SINGLE 44PLCC |
| ST16C450CP40-F | IC INTERFACE UART |
| ST16C452IJ68-F | IC UART W/PAR PORT DUAL 68PLCC |
| ST16C454IJ68TR-F | IC UART QUAD 68PLCC |
| ST16C550CJ44-F | IC UART FIFO 16B SGL 44PLCC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C2552IQ48 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UART |
| ST16C32245 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:14 BIT DUAL SUPPLY BUS TRANSCEIVER LEVEL TRANSLATOR, A SIDE SERIES RESISTOR, 2 BIT I2C LINES |
| ST16C32245LBR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:14 BIT DUAL SUPPLY BUS TRANSCEIVER LEVEL TRANSLATOR, A SIDE SERIES RESISTOR, 2 BIT I2C LINES |
| ST16C32245TBR | 功能描述:總線收發(fā)器 14 BIT DUAL BUS RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| ST16C32245TBR-E | 功能描述:開關(guān) IC - 各種 Advanced Logic Signal Switch RoHS:否 制造商:Fairchild Semiconductor 開啟電阻（最大值）: 電源電壓-最大:4.4 V 電源電壓-最小:2.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:WLCSP-9 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。