參數(shù)資料
型號： ST10F269Z2Q6
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP144
封裝： 28 X 28 MM, PLASTIC, QFP-144
文件頁數(shù)： 96/184頁
文件大?。?/td> 3276K
代理商： ST10F269Z2Q6
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ST10F269
5 - INTERNAL FLASH MEMORY
be
temporarily
unlocked
for
update
(write)
operations.
With the two possibilities for write protection -
whole memory or block specific - a flexible
installation of write protection is supported to
protect the Flash memory or parts of it from
unauthorized programming or erase accesses
and to provide virus-proof protection for all system
code blocks. All write protection also is enabled
during boot operation.
Power Supply, Reset
The Flash module uses a single power supply for
both
read
and
write
functions.
Internally
generated and regulated voltages are provided for
the program and erase operations from 5V supply.
Once a program or erase cycle has been
completed, the device resets to the standard read
mode. At power-on, the Flash memory has a
setup phase of some microseconds (dependent
on the power supply ramp-up). During this phase,
Flash can not be read. Thus, if EA pin is high
(execution will start from Flash memory), the CPU
will remains in reset state until the Flash can be
accessed.
5.3 - Architectural Description
The
Flash
module
distinguishes
two
basic
operating modes, the standard read mode and the
command mode. The initial state after power-on
and after reset is the standard read mode.
5.3.1 - Read Mode
The Flash module enters the standard operating
mode, the read mode:
– After Reset command
– After every completed erase operation
– After every completed programming operation
– After
every
other
completed
command
execution
– Few microseconds after a CPU-reset has
started
– After incorrect address and data values of
command sequences or writing them in an
improper sequence
– After incorrect write access to a read protected
Flash memory
The read mode remains active until the last
command of a command sequence is decoded
which starts directly a Flash array operation, such
as:
– erase one or several blocks
– program a word into Flash array
– protect / temporary unprotect a block.
In the standard read mode read accesses are
directly controlled by the Flash memory array,
delivering
a
32-bit
double
Word
from
the
addressed position. Read accesses are always
aligned to double Word boundaries. Thus, both
low order address bit A1 and A0 are not used in
the Flash array for read accesses. The high order
address bit A17/A16 define the physical 64K Byte
segment being accessed within the Flash array.
5.3.2 - Command Mode
Every operation besides standard read operations
is initiated by commands written to the Flash
command register. The addresses used for
command cycles define in conjunction with the
actual state the specific step within command
sequences. With the last command of a command
sequence, the Erase-Program Controller (EPC)
starts the execution of the command. The EPC
status is indicated during command execution by:
– The Status Register,
– The Ready/Busy signal.
5.3.3 - Ready/Busy Signal
The Ready/Busy (R/B) signal is connected to the
XPER2 interrupt node (XP2IC). When R/B is high,
the Flash is busy with a Program or Erase
operation and will not accept any additional
program or erase instruction. When R/B is Low,
the Flash is ready for any Read/Write or Erase
operation. The R/B will also be low when the
memory is put in Erase Suspend mode.
This signal can be polled by reading XP2IC
register, or can be used to trigger an interrupt
when the Flash goes from Busy to Ready.
5.3.4 - Flash Status Register
The Flash Status register is used to flag the status
of the Flash memory and the result of an
operation. This register can be accessed by Read
cycles
during
the
program-Erase
Controller
operations. The program or erase operation can
be controlled by data polling on bit FSB.7 of
Status Register, detection of Toggle on FSB.6 and
FSB.2, or Error on FSB.5 and Erase Time-out on
FSB.3 bit. Any read attempt in Flash during EPC
operation will automatically output these five bits.
The EPC sets bit FSB.2, FSB.3, FSB.5, FSB.6
and FSB.7. Other bits are reserved for future use
and should be masked.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST10F269Z2Q6/TR 功能描述:16位微控制器 - MCU 16B MCU 256K Byte and 12K Byte RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
ST10F269Z2QX 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM
ST10F269Z2T3 功能描述:16位微控制器 - MCU ST10F272 16B MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
ST10F269Z2T6 功能描述:16位微控制器 - MCU ST10F272 16B MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
ST10F269ZX 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM
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