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參數(shù)資料
| 型號(hào)： | SSTUA32866EC/G |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96 |
| 封裝： | 13.50 X 5.50 MM, 1.05 MM HEIGHT, LEAD FREE, PLASTIC, SOT-536-1, LFBGA-96 |
| 文件頁數(shù)： | 17/28頁 |
| 文件大?。?/td> | 153K |
| 代理商： | SSTUA32866EC/G |
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SSTUA32866_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 26 March 2007
24 of 28
NXP Semiconductors
SSTUA32866
1.8 V DDR2-667 congurable registered buffer with parity
13.4 Reow soldering
Key characteristics in reow soldering are:
Lead-free versus SnPb soldering; note that a lead-free reow process usually leads to
higher minimum peak temperatures (see Figure 28) than a PbSn process, thus
reducing the process window
Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
Reow temperature prole; this prole includes preheat, reow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classied in accordance with
Table 11 and 12
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reow
soldering, see Figure 28.
Table 11.
SnPb eutectic process (from J-STD-020C)
Package thickness (mm)
Package reow temperature (
°C)
Volume (mm3)
< 350
≥ 350
< 2.5
235
220
≥ 2.5
220
Table 12.
Lead-free process (from J-STD-020C)
Package thickness (mm)
Package reow temperature (
°C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
1.6 to 2.5
260
250
245
> 2.5
250
245
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| SSTUA32866EC/G,551 | 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96 |
| SSTUA32866EC/G,557 | 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96 |
| SSTUAF32866BHLFT | 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| SSTUAF32869AHLFT | 32869 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA150 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SSTUA32S865 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications |
| SSTUA32S865BHLF | 功能描述:IC REGIST BUFF 25BIT DDR 160BGA RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:- 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| SSTUA32S865BHLFT | 功能描述:IC REGIST BUFF 25BIT DDR 160BGA RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:- 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| SSTUA32S865ET | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications |
| SSTUA32S865ET,518 | 功能描述:寄存器 1.8V 28BT REGBUFF/PAR-DDR2-667 RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
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