參數(shù)資料
型號: SST85LP1004A-M-C-LBTE
元件分類: 存儲(chǔ)控制器/管理單元
英文描述: IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA91
封裝: 12 X 24 MM, 1.30 MM HEIGHT, ROHS COMPLIANT, MO-210, LBGA-91
文件頁數(shù): 26/35頁
文件大?。?/td> 892K
代理商: SST85LP1004A-M-C-LBTE
2009 Silicon Storage Technology, Inc.
S71412-02-000
10/09
32
4 GByte NANDrive
SST85LP1004A
Data Sheet
AC Characteristics
Figure 4: AC Input/Output Reference Waveforms
Appendix
Differences between the SST NANDrive and ATA-6 Specifications
Idle Timer
The Idle timer uses an incremental value of 5 ms, rather than the 5 sec minimum increment value
specified in ATA specifications.
Recovery from Sleep Mode
For NANDrive devices, recovery from sleep mode is accomplished by simply issuing another com-
mand to the device. A hardware or software reset is not required.
1412 F13.0
REFERENCE POINTS
OUTPUT
INPUT
VIT
VIHT
VILT
VOT
AC test inputs are driven at VIHT (0.9 VDD) for a logic ‘1’ and VILT (0.1 VDD) for a logic ‘0’. Measure-
ment reference points for inputs and outputs are VIT (0.5 VDD) and VOT (0.5 VDD). Input rise and fall
times (10%
90%) are <10 ns.
Note: VIT - VINPUT Test
VOT - VOUTPUT Test
VIHT - VINPUT HIGH Test
VILT - VINPUT LOW Test
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