參數(shù)資料
型號(hào)： SST85LP1004A-M-C-LBTE
元件分類： 存儲(chǔ)控制器/管理單元
英文描述： IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA91
封裝： 12 X 24 MM, 1.30 MM HEIGHT, ROHS COMPLIANT, MO-210, LBGA-91
文件頁數(shù)： 23/35頁
文件大?。?/td> 892K
代理商： SST85LP1004A-M-C-LBTE
2009 Silicon Storage Technology, Inc.
S71412-02-000
10/09
3
4 GByte NANDrive
SST85LP1004A
Data Sheet
General Description
Each NANDrive contains an integrated ATA Controller and one or more NAND Flash die in a LBGA
package. Refer to Figure 1 for the NANDrive block diagram.
Performance-optimized NANDrive
The heart of the NANDrive is the ATA Flash Disk Controller which translates standard ATA signals into
flash media data and control signals. The following components contribute to the NANDrive’s operation.
Microcontroller Unit (MCU)
The MCU translates ATA/IDE commands into data and control signals required for flash media opera-
tion.
Internal Direct Memory Access (DMA)
The NANDrive uses internal DMA allowing instant data transfer from buffer to flash media. This imple-
mentation eliminates microcontroller overhead associated with the traditional, firmware-based
approach, thereby increasing the data transfer rate.
Power Management Unit (PMU)
The power management unit controls the power consumption of the NANDrive. The PMU dramatically
reduces the power consumption of the NANDrive by putting the part of the circuitry that is not in oper-
ation into sleep mode.
The Flash File System handles inadvertent power interrupts and has auto-recovery capability to insure
NANDrive data integrity. For regular power management, the Host must send an Idle_Immediate com-
mand and wait for command ready before powering down the NANDrive.
SRAM Buffer
A key contributor to the NANDrive performance is an SRAM buffer. The buffer optimizes the host’s data
transfer to and from the flash media.
Embedded Flash File System
The embedded flash file system is an integral part of the NANDrive. It contains MCU firmware that per-
forms the following tasks:
1.
Translates host side signals into flash media writes and reads.
2.
Provides flash media wear leveling to spread the flash writes across all memory address
space to increase the longevity of flash media.
3.
Keeps track of data file structures.
Error Correction Code (ECC)
High performance is achieved through optimized hardware error detection and correction.
Serial Communication Interface (SCI)
The Serial Communication Interface (SCI) is designed for manufacturing error reporting. During the
design process, always provide access to the SCI interface in the PCB design to aid in design validation.
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