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參數(shù)資料
| 型號(hào)： | SST55VD020-60-I-TQWE |
| 廠商： | SILICON STORAGE TECHNOLOGY INC |
| 元件分類： | 存儲(chǔ)控制器/管理單元 |
| 英文描述： | IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, ROHS COMPLIANT, MS-026, TQFP-100 |
| 文件頁(yè)數(shù)： | 24/45頁(yè) |
| 文件大小： | 666K |
| 代理商： | SST55VD020-60-I-TQWE |
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30
Data Sheet
NAND Controller
SST55VD020
2009 Silicon Storage Technology, Inc.
S71355-03-000
07/09
Features 01H and 81H are used to enable and clear 8-bit data transfer mode. If the 01H feature command is issued
all data transfers will occur on the low order D7-D0 data bus and the IOCS16# signal will not be asserted for data
register accesses.
Features 02H and 82H allow the host to enable or disable write cache in the NAND Controllers that implement
write cache. When the subcommand Disable-Write-Cache is issued, the NAND Controller should initiate the
sequence to flush cache to non-volatile memory before command completion.
Feature 03H allows the host to select the transfer mode by specifying a value in the Sector Count register. The
upper 5 bits define the type of transfer and the low order 3 bits encode the mode value. One PIO mode is selected
at all times. The host may change the selected modes by the Set-Features command.
Feature 55H is the default feature for the NAND Controller. Therefore, the host does not have to issue Set-Features
command with this feature unless it is necessary for compatibility reasons.
Features 66H and CCH can be used to enable and disable whether the Power-on Reset (POR) Defaults will be set
when a software reset occurs.
CCH
Enable Power-on Reset (POR) establishment of defaults at software reset.
T0-0.0 1355
TABLE
9: Features Supported
Feature
Operation
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| SST55VD020-60-I-TQWE-TM024 | 功能描述:閃存 ATA Media 60MHz 3.3V Industrial RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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