參數(shù)資料
型號(hào)： SST55LD019C-45-C-BWE
廠商： SILICON STORAGE TECHNOLOGY INC
元件分類： 存儲(chǔ)控制器/管理單元
英文描述： FLASH MEMORY DRIVE CONTROLLER, PBGA84
封裝： LEAD FREE, MO-210, TFBGA-84
文件頁(yè)數(shù)： 76/76頁(yè)
文件大?。?/td> 711K
代理商： SST55LD019C-45-C-BWE
Advance Information
ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C
2004 Silicon Storage Technology, Inc.
S71241-02-000
4/04
9
TABLE
3-1: PIN ASSIGNMENTS (1 OF 3)
Symbol
Pin No.
Pin
Type
I/O
Type1
Name and Functions
100-TQFP
64-TQFP
84-BGA
Host Side Interface
A2
53
33
J8
I
I1Z
A[2:0] are used to select one of eight registers in the Task File.
A1
22
15
G3
A0
23
16
H1
D15
65
40
F8
I/O
I1Z/O2
D[15:0] Data bus
D14
66
41
E10
D13
67
42
E9
D12
68
43
E8
D11
70
45
D10
71
46
D9
72
47
C10
D8
73
48
D8
D7
3
1
C3
D6
4
2
C4
D5
5
3
B2
D4
6
4
D4
D3
8
6
C2
D2
9
7
D3
D1
10
8
C1
D0
11
9
D2
DMACK
20
13
G2
I
I2U
DMA Acknowledge - input from host
DMARQ
14
11
E3
O
O1
DMA Request to host
CS1FX#
24
18
H2
II2Z
CS1FX# is the chip select for the task file registers
CS3FX#
52
31
K9
CS3FX# is used to select the alternate status register and the
Device Control register.
CSEL
56
36
J10
I
I1U
This internally pulled-up signal is used to configure this device
as a Master or a Slave. When this pin is grounded, this device
is configured as a Master. When the pin is open, this device is
configured as a Slave. The pin setting should remain the same
from Power-on to Power-down.
IORD#
19
12
F1
II2Z
This is an I/O Read strobe generated by the host. This signal
gates I/O data onto the bus from the chip.
IOWR#
57
37
H9
The I/O Write strobe pulse is used to clock I/O data into the
chip.
IOCS16#
55
35
H8
O
O2
This output signal is asserted low when the device is indicating
a word data transfer cycle.
INTRQ
21
14
G1
O
O1
This signal is the active high Interrupt Request to the host.
PDIAG#
54
34
J9
I/O
I1U/O1
The Pass Diagnostic signal in the Master/Slave handshake
protocol.
DASP#
75
50
B10
I/O
I1U/O6
The Drive Active/Slave Present signal in the Master/Slave
handshake protocol.
RESET#
1
63
A2
I
I2U
This input pin is the active low hardware reset from the host.
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SST55LD019C-45-C-TQWE 功能描述:總線收發(fā)器 ATA Media 45MHz 3.3V Commercial RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SST55LD019C-45-I-TQWE 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:ATA Flash Disk Controller
SST55LD019M 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:ATA Flash Disk Controller
SST55LD019M-45-C-BWE 功能描述:總線收發(fā)器 ATA Media 45MHz 3.3V Commercial RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SST55LD019M-45-C-MVWE 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:ATA Flash Disk Controller
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