參數(shù)資料
型號： SST48CF048-C1
元件分類： PROM
英文描述： 24M X 16 FLASH 3.3V PROM CARD, 100 ns, XMA50
封裝： CARD-50
文件頁數(shù)： 3/62頁
文件大小： 1077K
代理商： SST48CF048-C1
Data Sheet
CompactFlash Card
SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
11
2002 Silicon Storage Technology, Inc.
S71125-03-000
2/02
375
-OE
(PC Card Memory mode)
I
9
This is an Output Enable strobe generated by the host interface. It is
used to read data from the CompactFlash card in Memory mode and
to read the CIS and configuration registers.
-OE
(PC Card I/O mode)
In PC Card I/O mode, this signal is used to read the CIS and configu-
ration registers.
-ATA SEL
(True IDE mode)
To enable True IDE mode this input should be grounded by the host.
RDY/-BSY
PC Card Memory mode)
O
37
In Memory mode this signal is set high when the CompactFlash card
is ready to accept a new data transfer operation and held low when
the card is busy. The Host memory card socket must provide a pull-
up resistor.
At power up and at Reset, the RDY/-BSY signal is held low (busy)
until the CompactFlash card has completed its power up or reset
function. No access of any type should be made to the Compact-
Flash card during this time. The RDY/-BSY signal is held high (dis-
abled from being busy) whenever the following condition is true: The
CompactFlash card has been powered up with +RESET continu-
ously disconnected or asserted.
-IREQ
PC Card I/O mode)
I/O Operation - After the CompactFlash card has been configured for
I/O operation, this signal is used as -Interrupt Request. This line is
strobed low to generate a pulse mode interrupt or held low for a level
mode interrupt.
INTRQ
(True IDE mode)
In True IDE mode signal is the active high Interrupt Request to the
host.
-REG
(PC Card Memory mode)
I
44
This signal is used during Memory cycles to distinguish between
Common Memory and Register (Attribute) Memory Attribute Memory
Select accesses. High for Common Memory, Low for Attribute Mem-
ory.
-REG
PC Card I/O mode)
The signal must also be active (low) during I/O Cycles when the I/O
address is on the Bus.
-REG
(True IDE mode)
In True IDE mode this input signal is not used and should be con-
nected to VDD by the host.
RESET
(PC Card Memory mode)
I
41
When the pin is high, this signal Resets the CompactFlash card. The
CompactFlash card is Reset only at power up if this pin is left high or
open from power-up. The CompactFlash card is also Reset when the
Soft-Reset bit in the Card Configuration Option register is set.
RESET
(PC Card I/O mode)
This signal is the same as the PC Card Memory mode signal.
-RESET
(True IDE mode)
In the True IDE mode this input pin is the active low hardware reset
from the host.
VDD
(PC Card Memory mode)
-
13,38
+5.0V, +3.3V power.
VDD
(PC Card I/O mode)
This signal is the same for all modes.
VDD
(True IDE mode)
This signal is the same for all modes.
TABLE
2-2: SIGNAL DESCRIPTION (CONTINUED) (3 OF 4)
Symbol
Type1
Pin
Name and Functions
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