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參數(shù)資料
| 型號： | SPC5517GAMMG66 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 16/54頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 32B 1.5MB FLASH 208MAPBGA |
| 標準包裝： | 90 |
| 系列： | MPC55xx Qorivva |
| 核心處理器： | e200z1 |
| 芯體尺寸： | 32-位 |
| 速度： | 66MHz |
| 連通性： | CAN，EBI/EMI，I²C，SCI，SPI |
| 外圍設(shè)備： | DMA，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 144 |
| 程序存儲器容量： | 1.5MB（1.5M x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 80K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 40x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 208-BGA |
| 包裝： | 托盤 |
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Electrical Characteristics
MPC5510 Microcontroller Family Data Sheet, Rev. 3
Freescale Semiconductor
23
device. This description is most useful for packages with heat sinks where some 90% of the heat flow is through the case to the
heat sink to ambient. For most packages, a better model is required.
A more accurate two-resistor thermal model can be constructed from the junction to board thermal resistance and the junction
to case thermal resistance. The junction to case covers the situation where a heat sink will be used or where a substantial amount
of heat is dissipated from the top of the package. The junction to board thermal resistance describes the thermal performance
when most of the heat is conducted to the printed circuit board. This model can be used for either hand estimations or for a
computational fluid dynamics (CFD) thermal model.
To determine the junction temperature of the device in the application after prototypes are available, the Thermal
Characterization Parameter (
Ψ
JT) can be used to determine the junction temperature with a measurement of the temperature at
the top center of the package case using the following equation:
TJ = TT + (ΨJT × PD)
Eqn. 14
where:
TT = thermocouple temperature on top of the package (
oC)
Eqn. 15
Ψ
JT = thermal characterization parameter (
oC/W)
Eqn. 16
PD = power dissipation in the package (W)
Eqn. 17
The thermal characterization parameter is measured per JESD51-2 specification using a 40-gauge type T thermocouple epoxied
to the top center of the package case. The thermocouple should be positioned so that the thermocouple junction rests on the
package. A small amount of epoxy is placed over the thermocouple junction and over about 1 mm of wire extending from the
junction. The thermocouple wire is placed flat against the package case to avoid measurement errors caused by cooling effects
of the thermocouple wire.
References:
Semiconductor Equipment and Materials International
805 East Middlefield Rd
Mountain View, CA 94043
(415) 964-5111
MIL-SPEC and EIA/JESD (JEDEC) specifications are available from Global Engineering Documents at 800-854-7179 or
303-397-7956.
JEDEC specifications are available on the WEB at http://www.jedec.org.
1.
C.E. Triplett and B. Joiner, “An Experimental Characterization of a 272 PBGA Within an Automotive Engine
Controller Module,” Proceedings of SemiTherm, San Diego, 1998, pp. 47–54.
2.
G. Kromann, S. Shidore, and S. Addison, “Thermal Modeling of a PBGA for Air-Cooled Applications,” Electronic
Packaging and Production, pp. 53–58, March 1998.
3.
B. Joiner and V. Adams, “Measurement and Simulation of Junction to Board Thermal Resistance and Its Application
in Thermal Modeling,” Proceedings of SemiTherm, San Diego, 1999, pp. 212–220.
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