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參數(shù)資料
| 型號： | SP505BCM-L |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 9/35頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX WAN MULTI-MODE 80LQFP |
| 標(biāo)準(zhǔn)包裝： | 84 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 7/7 |
| 規(guī)程： | 多協(xié)議 |
| 電源電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-LQFP |
| 供應(yīng)商設(shè)備封裝： | 80-LQFP（14x14） |
| 包裝： | 托盤 |
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Exar Coporation 48720 Kato Road, Fremont CA, 94538 (50) 668-7000 Fax (50) 668-707 www.exar.com
SP505_00_08308
Pin 7 — SCTEN — Enables SCT receiver;
active high; TTL input.
Pin 8 — LATCH — Latch control for decoder
bits (pins 9-2), active low. Logic high input
will make decoder transparent.
Pins2–9—DEC
0 – DEC3 — Transmitter and
receiver decode register; configures trans-
mitter and receiver modes; TTL inputs.
Pin 8 — RLEN — Enables RL driver; active
low; TTL input.
Pin 23 — STEN — Enables ST driver; active
low; TTL input.
POWER SUPPLIES
Pins 25, 33, 4, 48, 55, 62, 73, 74 — V
CC
— +5V input.
Pins 29, 34, 43, 46, 50, 53, 57, 60, 64, 72,
75 — GND — Ground.
Pin 27 — V
DD +0V Charge Pump Capacitor
— Connects from V
DD to VCC. Suggested
capacitor size is 22F, 6V.
Pin 32 — V
SS –0V Charge Pump Capacitor
— Connects from ground to V
SS. Suggested
capacitor size is 22F, 6V.
Pins 26 and 30 — C
+
and C
–
— Charge
PumpCapacitor —ConnectsfromC
+
toC
–
.
Suggested capacitor size is 22F, 6V.
Pins 28 and 3 — C
2
+
and C
2
–
— Charge
PumpCapacitor —ConnectsfromC
2
+
toC
2
–
.
Suggested capacitor size is 22F, 6V.
Pin45—RL(b)—RemoteLoopback;analog
output, non-inverted; sourced from RL.
Pin47—RL(a) —RemoteLoopback;analog
output inverted; sourced from RL.
Pin 49— LL(b) — Local Loopback; analog
output, non-inverted; sourced from LL.
Pin 5 — LL(a) — Local Loopback; analog
output, inverted; sourced from LL.
Pin 52 — RS(b) — Ready To Send; analog
output, non-inverted; sourced from RTS.
Pin 54 — RS(a) — Ready To Send; analog
output, inverted; sourced from RTS.
Pin 56 — TR(b) — Terminal Ready; analog
output, non-inverted; sourced from DTR.
Pin 58 — TR(a) — Terminal Ready; analog
output, inverted; sourced from DTR.
Pin 66 — CS(a)— Clear To Send; analog
input, inverted; source for CTS.
Pin 67 — CS(b)— Clear To Send; analog
input, non-inverted; source for CTS.
Pin 68 — DM(a)— Data Mode; analog input,
inverted; source for DSR.
Pin 69 — DM(b)— Data Mode; analog input,
non-inverted; source for DSR
Pin78—DSR—DataSetReady;TTLoutput;
sourced from DM(a), DM(b) inputs.
Pin 80 — CTS— Clear To Send; TTLoutput;
sourced from CS(a) and CS(b) inputs.
CONTROL REGISTERS
Pins 2 — SDEN — Enables TxD driver,
active low; TTL input.
Pins 3 — TREN — Enables DTR driver,
active low; TTL input.
Pins 4 — RSEN — Enables RTS driver,
active low; TTL input.
Pins 5 — LLEN — Enables LL driver, active
low; TTL input.
Pin 6 — TTEN — Enables TT driver, active
low; TTL input.
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