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參數(shù)資料
| 型號： | SP504MCM-L |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 6/32頁 |
| 文件大小： | 0K |
| 描述： | IC TXRX WAN MULTI-MODE 80LQFP |
| 標(biāo)準(zhǔn)包裝： | 84 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 7/7 |
| 規(guī)程： | 多協(xié)議 |
| 電源電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-LQFP |
| 供應(yīng)商設(shè)備封裝： | 80-LQFP（14x14） |
| 包裝： | 托盤 |
| 其它名稱： | 1016-1682 SP504MCM-L-ND |
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 50-668-707 www.exar.com
SP504_02_2708
Exar Corporation 48720 Kato Road, Fremont CA, 94538 50-668-707 www.exar.com
SP504_02_2708
FEATURES…
The
SP504isahighlyintegratedserial trans-
ceiverthatallowssoftwarecontrolofitsinter-
facemodes.SimilartotheSP503,the
SP504
offers the same hardware interface modes
for RS-232 (V.28), RS-422A(V.), RS-449,
RS-485,V.35,EIA-530andincludesV.36and
EIA-530A. The interface mode selec-
tion is done via an 8–bit switch; four
(4) bits control the drivers and four (4)
bits control the receivers. The
SP504
is fabricated using low power BiCMOS
process technology, and incorporates a
Exar patented (5,306,954) charge pump
allowing +5V only operation. Each device
is packaged in an 80–pin JEDEC Quad
FlatPack package.
The
SP504 is ideally suited for wide area
network connectivity based on the interface
modes offered and the driver and receiver
configurations. The
SP504 has seven (7)
independent drivers and seven (7) indepen-
dent receivers. In V.35 mode, the
SP504
includes the necessary components and
termination resistors internal within the de-
vice for compliant V.35 operation.
THEORY OF OPERATION
The
SP504 is made up of five separate
circuit blocks — the charge pump, drivers,
receivers,decoderandswitchingarray. Each
of these circuit blocks is described in more
detail below.
Charge–Pump
The
SP504's charge pump design is based
on the SP503 where
Exar'spatentedcharge
pump design (5,306,954) uses a four–phase
voltage shifting technique to attain sym-
metrical ±0V power supplies. In addition,
the
SP504 charge pump incorporates a
"programmable" feature that produces
an output of ±0V or ±5V for V
SS and VDD
depending on the mode of operation. The
charge pump still requires external capaci-
tors to store the charge. Figure 8a shows
the waveform found on the positive side of
capacitor C2, and Figure 8b shows the
negative side of capcitor C2. There is a
free–running oscillator that controls the four
phases of the voltage shifting. A description
of each phase follows.
The
SP504 charge pump is used for RS-232
where the output voltage swing is typically
±0V and also used for RS-423. However,
RS-423 requires the voltage swing on the
driver output be between ±4V to ±6V during
an open circuit (no load). The charge pump
would need to be regulated down from ±0V
to ±5V. A typical ±0V charge pump would
require external clamping such as 5V zener
diodes on V
DD and VSS to ground. The ±5V
output has symmetrical levels as in the ±0V
output. The ±5V is used in the following
modes where RS-423 levels are used: RS-
449, EIA-530, EIA-530A and V.36.
Phase 1 (±10V)
— V
SS charge storage — During this phase
of the clock cycle, the positive side of capaci-
tors C
and C2 are initially charged to +5V.
The C
l
+
is then switched to ground and the
charge on C
–
is transferred to C
2
–
. Since C
2
+
is connected to +5V, the voltage potential
across capacitor C
2 is now 0V.
Phase 1 (±5V)
— V
SS & VDD charge storage and transfer
— With the C
and C2 capacitors initially
charged to +5V, C
l
+
is then switched to
ground and the charge on C
–
is transferred
to the V
SS storage capacitor.
Simultane-
ously the C
2
–
is switched to ground and the
5V charge on C
2
+
is transferred to the V
DD
storage capacitor.
VCC = +5V
+5V
VDD Storage Capacitor
C1
C2
C4
+
–
VSS Storage Capacitor
C3
+
–
–5V
VCC= +5V
–5V
+5V
VDD Storage Capacitor
C1
C2
C4
+
–
VSSStorage Capacitor
C3
+
–
Figure 4a. Charge Pump Phase for ±0V.
Figure 4b. Charge Pump Phase for ±5V.
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參數(shù)描述 |
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