參數(shù)資料
型號： SNJ54LVTH16646WD
廠商： TEXAS INSTRUMENTS INC
元件分類： 總線收發(fā)器
英文描述： LVT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDFP56
封裝： CERAMIC, DFP-56
文件頁數(shù)： 7/14頁
文件大?。?/td> 398K
代理商： SNJ54LVTH16646WD
SN54LVTH16646, SN74LVTH16646
3.3V ABT 16BIT BUS TRANSCEIVERS AND REGISTERS
WITH 3STATE OUTPUTS
SCBS698G JULY 1997 REVISED MAY 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked
into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1
illustrates the four fundamental bus-management functions that can be performed with the ’LVTH16646
devices.
Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the
transceiver mode, data present at the high-impedance port may be stored in either register or in both. The
select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry
used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition
between stored and real-time data. DIR determines which bus receives data when OE is low. In the isolation
mode (OE high), A data can be stored in one register and/or B data can be stored in the other register.
When an output function is disabled, the input function still is enabled and can be used to store and transmit
data. Only one of the two buses, A or B, can be driven at a time.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
INPUTS
DATA I/O
OPERATION OR FUNCTION
OE
DIR
CLKAB
CLKBA
SAB
SBA
A1A8
B1B8
OPERATION OR FUNCTION
X
↑
X
Input
Unspecified
Store A, B unspecified
X
XX
↑
X
Unspecified
Input
Store B, A unspecified
H
X
↑
X
Input
Store A and B data
H
X
H or L
X
Input disabled
Isolation, hold storage
L
X
L
Output
Input
Real-time B data to A bus
L
X
H or L
X
H
Output
Input
Stored B data to A bus
L
H
X
L
X
Input
Output
Real-time A data to B Bus
L
H
H or L
X
H
X
Input
Output
Stored A data to bus
The data-output functions can be enabled or disabled by various signals at OE or DIR. Data-input functions always are enabled, i.e., data at the
bus terminals is stored on every low-to-high transition of the clock inputs.
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