- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄97086 > SN74LVC2G74DCU (TEXAS INSTRUMENTS INC) LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8 PDF資料下載
參數(shù)資料
| 型號： | SN74LVC2G74DCU |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 鎖存器 |
| 英文描述： | LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8 |
| 封裝： | PLASTIC, TSSOP-8 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 135K |
| 代理商： | SN74LVC2G74DCU |
SN74LVC2G74
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCES203B – APRIL 1999 – REVISED FEBRUARY 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
D Ioff Supports Partial-Power-Down Mode
Operation
D Supports 5-V VCC Operation
D Package Options Include Plastic Thin
Shrink Small-Outline (DCT, DCU) Packages
description
This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.
A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,
data at the D input can be changed without affecting the levels at the outputs.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The SN74LVC2G74 is characterized for operation from –40
°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUTS
PRE
CLR
CLK
D
Q
L
H
X
H
L
H
LX
XL
H
L
LX
X
H
↑
HH
L
H
↑
LL
H
L
X
Q0
This configuration is nonstable; that is, it does not
persist when PRE or CLR returns to its inactive
(high) level.
logic symbol
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
S
7
1
CLK
D
2
D
R
6
Q
5
3
C
PRE
CLR
Q
PRODUCT
PREVIEW
Copyright
2000, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
DCT OR DCU PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
CLK
D
Q
GND
VCC
PRE
CLR
Q
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74LVC541PW | LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| SN74LVC544APWR | LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| SN74LVC544APWLE | LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| SN74LVC544ADWR | LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| SN74LVC544DWR | LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LVC2G74DCUR | 功能描述:觸發(fā)器 Positive Edge Trig RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LVC2G74DCUR | 制造商:Texas Instruments 功能描述:Flip Flop Logic IC Leaded Process Compat |
| SN74LVC2G74DCURE4 | 功能描述:觸發(fā)器 Single D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LVC2G74DCURG4 | 功能描述:觸發(fā)器 Positive Edge Trig RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LVC2G74DCUT | 功能描述:觸發(fā)器 DTyp SNGL Pos Edge Triggered FlipFlop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。