參數(shù)資料
型號: SN74HC646NT
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: HC/UH SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDIP24
封裝: ROHS COMPLIANT, PLASTIC, DIP-24
文件頁數(shù): 1/15頁
文件大?。?/td> 459K
代理商: SN74HC646NT
SN54HC646, SN74HC646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCLS150C – DECEMBER 1982 – REVISED MARCH 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Wide Operating Voltage Range of 2 V to 6 V
D High-Current 3-State Outputs Can Drive Up
To 15 LSTTL Loads
D Low Power Consumption, 80-A Max ICC
D Typical tpd = 11 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 A Max
D Independent Registers for A and B Buses
D Multiplexed Real-Time and Stored Data
D True Data Paths
14 15 16 17
SN54HC646 ...JT OR W PACKAGE
SN74HC646 . . . DW OR NT PACKAGE
(TOP VIEW)
SN54HC646 . . . FK PACKAGE
(TOP VIEW)
CLKAB
SAB
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCC
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
B8
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
43
2 1 28
12 13
OE
B1
B2
NC
B3
B4
B5
A1
A2
A3
NC
A4
A5
A6
DIR
SAB
CLKAB
B8
B7
A8
GND
NC
CLKBA
SBA
V
A7
B6
18
27 26
CC
NC – No internal connection
description/ordering information
The ’HC646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control
circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.
Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB
or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed
with the ’HC646 devices.
Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver
mode, data present at the high-impedance port may be stored in either or both registers.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR
determines which bus receives data when OE is active (low). In the isolation mode (OE high), A data may be
stored in one register and /or B data may be stored in the other register.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – NT
Tube
SN74HC646NT
–40
°C to 85°C
SOIC
DW
Tube
SN74HC646DW
HC646
SOIC – DW
Tape and reel
SN74HC646DWR
HC646
CDIP – JT
Tube
SNJ54HC646JT
–55
°C to 125°C
CFP – W
Tube
SNJ54HC646W
LCCC – FK
Tube
SNJ54HC646FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
2003, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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PDF描述
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SN74HC652DWE4 功能描述:總線收發(fā)器 Octal Bus Trncvr/Reg W/3-State Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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