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參數(shù)資料
| 型號： | SN74AUP1G240YEPR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | AUP/ULP/V SERIES, 1-BIT DRIVER, INVERTED OUTPUT, BGA5 |
| 封裝： | DSBGA-5 |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 540K |
| 代理商： | SN74AUP1G240YEPR |
www.ti.com
Absolute Maximum Ratings
(1)
Recommended Operating Conditions
(1)
LOW-POWER SINGLE BUFFER/DRIVER
WITH 3-STATE OUTPUT
SCES627A – MARCH 2005 – REVISED AUGUST 2006
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
4.6
V
VI
Input voltage range(2)
–0.5
4.6
V
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
–0.5
4.6
V
VO
Output voltage range in the high or low state(2)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±20
mA
Continuous current through VCC or GND
±50
mA
DBV package
206
θ
JA
Package thermal impedance(3)
DCK package
252
°C/W
YEP/YZP package
132
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The package thermal impedance is calculated in accordance with JESD 51-7.
MIN
MAX
UNIT
VCC
Supply voltage
0.8
3.6
V
VCC = 0.8 V
VCC
3.6
VCC = 1.1 V to 1.95 V
0.65
× V
CC
3.6
VIH
High-level input voltage
V
VCC = 2.3 V to 2.7 V
1.6
3.6
VCC = 3 V to 3.6 V
2
3.6
VCC = 0.8 V
0
VCC = 1.1 V to 1.95 V
0 0.35
× V
CC
VIL
Low-level input voltage
V
VCC = 2.3 V to 2.7 V
0
0.7
VCC = 3 V to 3.6 V
0
0.9
Active state
0
VCC
VO
Output voltage
V
3-state
0
3.6
t/v
Input transition rise or fall rate
VCC = 0.8 V to 3.6 V
200
ns/V
TA
Operating free-air temperature
–40
85
°C
(1)
The A data input pins may be floated if the OE is high and the outputs are disabled; otherwise, all unused inputs of the device must be
held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
3
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| SN74AUP1G32DBVRE4 | 功能描述:邏輯門 Lo PWR SNGL 2Input Pos OR Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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