參數資料
型號: SN74AUP1G240YEPR
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: AUP/ULP/V SERIES, 1-BIT DRIVER, INVERTED OUTPUT, BGA5
封裝: DSBGA-5
文件頁數: 10/17頁
文件大小: 540K
代理商: SN74AUP1G240YEPR
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
A
Y
OE
1
2
4
LOW-POWER SINGLE BUFFER/DRIVER
WITH 3-STATE OUTPUT
SCES627A – MARCH 2005 – REVISED AUGUST 2006
This buffer/driver is a single line driver with a 3-state output. The output is disabled when the output-enable (OE)
input is high. This device has the input-disable feature, which allows floating input signals.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I
off. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar – WCSP (DSBGA)
Reel of 3000
SN74AUP1G240YEPR
0.23-mm large bump – YEP
_ _ _HK_
NanoFree – WCSP (DSBGA)
0.23-mm large bump – YZP
Reel of 3000
SN74AUP1G240YZPR
–40
°C to 85°C
(Pb-free)
SOT (SOT-23) – DBV
Reel of 3000
SN74AUP1G240DBVR
H40_
SOT (SC-70) – DCK
Reel of 3000
SN74AUP1G240DCKR
HK_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE
A
L
H
L
H
X(1)
Z
(1)
Floating inputs allowed.
LOGIC DIAGRAM (POSITIVE LOGIC)
2
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相關代理商/技術參數
參數描述
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