- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98106 > SN74AUP1G08DBVRE4 (TEXAS INSTRUMENTS INC) AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5 PDF資料下載
參數(shù)資料
| 型號： | SN74AUP1G08DBVRE4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 門電路 |
| 英文描述： | AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5 |
| 封裝： | GREEN, PLASTIC, SOT-23, 5 PIN |
| 文件頁數(shù)： | 24/25頁 |
| 文件大?。?/td> | 1135K |
| 代理商： | SN74AUP1G08DBVRE4 |
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 , slew rate ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. All parameters and waveforms are not applicable to all devices.
5, 10, 15, 30 pF
VCC/2
VCC
0.15 V
VCC = 1.2 V
± 0.1 V
VCC = 0.8 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
5, 10, 15, 30 pF
VCC/2
VCC
0.1 V
5, 10, 15, 30 pF
VCC/2
VCC
0.1 V
5, 10, 15, 30 pF
VCC/2
VCC
0.1 V
CL
VM
VI
V
5, 10, 15, 30 pF
VCC/2
VCC
0.15 V
5, 10, 15, 30 pF
VCC/2
VCC
0.3 V
Output
Waveform 1
S1 at 2
× VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VCC
0 V
VOL + V
VOH - V
≈0 V
VCC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Control
VCC/2
tPLZ/tPZL
tPHZ/tPZH
2
× VCC
GND
TEST
S1
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1
GND
5 k
5 k
2
× VCC
SCES502J – NOVEMBER 2003 – REVISED MAY 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
Figure 4. Load Circuit and Voltage Waveforms
8
Copyright 2003–2010, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP1G08
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74AUP1G08YEPR | 74AUP1G SERIES, 2-INPUT AND GATE, BGA5 |
| SN74AUP1G125YEPR | AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, BGA5 |
| SN74AUP1G14YZPR | AUP/ULP/V SERIES, 1-INPUT INVERT GATE, BGA5 |
| SN74AUP1G14DCKT | AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO5 |
| SN74AUP1G17DBVRG4 | AUP/ULP/V SERIES, 1-INPUT NON-INVERT GATE, PDSO5 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74AUP1G08DBVRG4 | 功能描述:邏輯門 Lo PWR SNGL 2Input Pos AND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G08DBVT | 功能描述:邏輯門 Lo PWR SNGL 2Input Pos AND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G08DBVTE4 | 功能描述:邏輯門 Lo PWR SNGL 2Input Pos AND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G08DBVTG4 | 功能描述:邏輯門 Lo PWR SNGL 2Input Pos AND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G08DCKR | 功能描述:邏輯門 LP Single 2-Input Positive-AND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。