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參數資料
| 型號： | SN74ALVCH16973DLR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | GREEN, PLASTIC, SSOP-48 |
| 文件頁數： | 14/16頁 |
| 文件大?。?/td> | 333K |
| 代理商： | SN74ALVCH16973DLR |
www.ti.com
OPERATING CHARACTERISTICS
(1)
SN74ALVCH16973
8-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH
WITH FOUR INDEPENDENT BUFFERS
SCES435B – APRIL 2003 – REVISED SEPTEMBER 2004
T
A = 25°C
VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V
PARAMETER
TEST CONDITIONS
UNIT
TYP
One fA = 10 MHz,
One fB = 10 MHz,
A outputs enabled,
TOE = GND,
Q outputs disabled,
12
14
19
LOE = VCC,
One A output switching
DIR = GND,
CL = 0 pF
One fA = 10 MHz,
One fB = 10 MHz,
B outputs enabled,
TOE = GND,
Q outputs disabled,
12
14
21
LOE = VCC,
One B output switching
DIR = GND,
Cpd(2)
Power dissipation
CL = 0 pF
pF
(each output)
capacitance
One fA = 10 MHz,
One fLE = 20 MHz,
Q outputs enabled,
One fQ = 10 MHz,
A and B I/Os isolated,
11
13
19
TOE = VCC,
One Q output switching
LOE = GND,
CL = 0 pF
One fD = 10 MHz,
One Y output switching,
One fY = 10 MHz,
A and B I/Os isolated,
TOE = VCC,
7
8
12
Q outputs disabled
LOE = VCC,
CL = 0 pF
One fA = 10 MHz,
A and B I/Os isolated,
One fLE = 20 MHz,
Power dissipation
Q outputs disabled,
fQ not switching,
Cpd (Z)
4
5
11
pF
capacitance
One LE and one A data
TOE = VCC,
input switching
LOE = VCC,
CL = 0 pF
fA not switching,
One fLE = 20 MHz,
A and B I/Os isolated,
Cpd(3)
Power dissipation
fQ not switching,
Q outputs disabled,
6
7
9
pF
(each LE)
capacitance
TOE = VCC,
One LE input switching
LOE = VCC,
CL = 0 pF
(1)
Total device Cpd for multiple (m) outputs switching and (n) LE inputs switching = [m * Cpd (each output)] + [n * Cpd (each LE)].
(2)
Cpd (each output) is the Cpd for each data bit (input and output circuitry) when it operates at 10 MHz (Note: the LE is operating at
20 MHz in this test, but its ICC component has been subtracted).
(3)
Cpd (each LE) is the Cpd for the clock circuitry only when it operates at 20 MHz.
7
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