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參數(shù)資料
| 型號： | SN54LVC574AJ |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20 |
| 封裝： | CERAMIC, DIP-20 |
| 文件頁數(shù)： | 3/13頁 |
| 文件大?。?/td> | 195K |
| 代理商： | SN54LVC574AJ |
EPIC is a trademark of Texas Instruments Incorporated.
The SN54LVC574A octal edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V V
CC
operation and the SN74LVC574A octal edge-triggered D-type flip-flop is designed for 1.65-V to
3.6-V V
CC operation.
These devices feature 3-state outputs designed specifically for driving highly capacitive or
relatively low-impedance loads. They are particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels at
the data (D) inputs.
A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal
logic state (high or low logic levels) or a high-impedance state. In the high-impedance state,
the outputs neither load nor drive the bus lines significantly. The high-impedance state and
increased drive provide the capability to drive bus lines without interface or pullup
components.
OE\ does not affect the internal operations of the flip-flops. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to
V
CC
through a pullup resistor; the minimum value of the resistor is determined by the current-
sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these
devices as translators in a mixed 3.3-V/5-V system environment.
The SN54LVC574A is characterized for operation over the full military temperature range of -
55°C to 125°C. The SN74LVC574A is characterized for operation from -40°C to 85°C.
To view the following documents, Acrobat Reader 3.x is required.
To download a document to your hard drive, right-click on the link and choose 'Save'.
Full datasheet in Acrobat PDF: scas301j.pdf (142 KB) (Updated: 07/23/1998)
Full datasheet in Zipped PostScript: scas301j.psz (137 KB)
View Application Reports for Digital Logic
l Bus-Interface Devices With Output-Damping Resistors Or Reduced -Drive
Outputs (SCBA012A - Updated: 08/01/1997)
l CMOS Power Consumption and CPD Calculation (SCAA035B -
Updated: 06/01/1997)
l
Implications of Slow or Floating CMOS Inputs (SCBA004C - Updated: 02/01/1998)
DESCRIPTION
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TECHNICAL DOCUMENTS
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DATASHEET
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APPLICATION NOTES
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