參數(shù)資料
型號: SN54LVC574AJ
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20
封裝: CERAMIC, DIP-20
文件頁數(shù): 9/13頁
文件大?。?/td> 195K
代理商: SN54LVC574AJ
SN54LVC574A, SN74LVC574A
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCAS301J – JANUARY 1993 – REVISED JULY 1998
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figures 1 through 3)
SN74LVC574A
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
150
MHz
tw
Pulse duration, CLK high or low
3.3
ns
tsu
Setup time, data before CLK
2
ns
th
Hold time, data after CLK
1.5
ns
This information was not available at the time of publication.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 3)
SN54LVC574A
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
UNIT
MIN
MAX
MIN
MAX
fmax
150
MHz
tpd
CLK
Q
8
1
7
ns
ten
OE
Q
9
1
7.5
ns
tdis
OE
Q
7
0.5
6.4
ns
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 through 3)
SN74LVC574A
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
fmax
150
MHz
tpd
CLK
Q
8
2.2
7
ns
ten
OE
Q
8.5
1.5
7.5
ns
tdis
OE
Q
7
1.7
6.4
ns
tsk(o)
1
ns
This information was not available at the time of publication.
Skew between any two outputs of the same package switching in the same direction
operating characteristics, TA = 25°C
PARAMETER
TEST
CONDITIONS
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
UNIT
CONDITIONS
TYP
Cpd
Power dissipation capacitance
Outputs enabled
f=10MHz
43
pF
Cpd
per flip-flop
Outputs disabled
f = 10 MHz
15
pF
This information was not available at the time of publication.
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