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參數(shù)資料
| 型號： | SN54LV273AFK |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 鎖存器 |
| 英文描述： | LV/LV-A/LVX/H SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CQCC20 |
| 封裝： | CERAMIC, CC-20 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 200K |
| 代理商： | SN54LV273AFK |
SN54LV273A, SN74LV273A
OCTAL D-TYPE FLIP-FLOPS
WITH CLEAR
SCLS399B – APRIL 1998 – REVISED MAY 2000
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
SN54LV273A
SN74LV273A
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
CLR low
6.5
7
ns
tw
Pulse duration
CLK high or low
7
8.5
ns
t
Set p time data before CLK
↑
Data
8.5
10.5
ns
tsu
Setup time, data before CLK
↑
CLR inactive
4
ns
th
Hold time, data after CLK
↑
0.5
1
ns
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
SN54LV273A
SN74LV273A
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
CLR low
5
6
ns
tw
Pulse duration
CLK high or low
5
6.5
ns
t
Set p time data before CLK
↑
Data
5.5
6.5
ns
tsu
Setup time, data before CLK
↑
CLR inactive
2.5
ns
th
Hold time, data after CLK
↑
1
ns
timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
SN54LV273A
SN74LV273A
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
CLR low
5
ns
tw
Pulse duration
CLK high or low
5
ns
t
Set p time data before CLK
↑
Data
4.5
ns
tsu
Setup time, data before CLK
↑
CLR inactive
2
ns
th
Hold time, data after CLK
↑
1
ns
switching
characteristics
over
recommended
operating
free-air
temperature
range,
VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
LOAD
TA = 25°C
SN54LV273A
SN74LV273A
UNIT
PARAMETER
(INPUT)
(OUTPUT)
CAPACITANCE
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
f
CL = 15 pF
55*
95*
45*
45
MHz
fmax
CL = 50 pF
45
75
40
MHz
tpd
CLK
Q
CL =15 pF
10.4*
18.3*
1*
20.5*
1
20.5
ns
tPHL
CLR
Q
CL = 15 pF
10.3*
19*
1*
21*
1
21
ns
tpd
CLK
Q
12.9
22.1
1
25
1
25
tPHL
CLR
Q
CL = 50 pF
13.1
22.8
1
25.5
1
25.5
ns
tsk(o)
2
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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