參數(shù)資料
型號: SN54221W
廠商: TEXAS INSTRUMENTS INC
元件分類: 諧振器
英文描述: TTL/H/L SERIES, DUAL MONOSTABLE MULTIVIBRATOR, CDFP16
封裝: CERAMIC, DFP-16
文件頁數(shù): 12/20頁
文件大?。?/td> 352K
代理商: SN54221W
SN54221, SN54LS221, SN74221, SN74LS221
DUAL MONOSTABLE MULTIVIBRATORS
WITH SCHMITT-TRIGGER INPUTS
SDLS213A – DECEMBER 1983 – REVISED FEBRUARY 1998
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
Jitter-free operation is maintained over the full temperature and VCC ranges for more than six decades of timing
capacitance (10 pF to 10
F) and more than one decade of timing resistance (2 k to 30 k for the SN54221,
2 k
to 40 k for the SN74221, 2 k to 70 k for the SN54LS221, and 2 k to 100 k for the SN74LS221).
Throughout these ranges, pulse width is defined by the relationship: tw(out) = CextRext In2 ≈ 0.7 CextRext. In
circuits where pulse cutoff is not critical, timing capacitance up to 1000
F and timing resistance as low as 1.4 k
can be used. Also, the range of jitter-free output pulse widths is extended if VCC is held to 5 V and free-air
temperature is 25
°C. Duty cycles as high as 90% are achieved when using maximum recommended RT. Higher
duty cycles are available if a certain amount of pulse-width jitter is allowed.
The variance in output pulse width from device to device typically is less than
±0.5% for given external timing
components. An example of this distribution for the ’221 is shown in Figure 3. Variations in output pulse width
versus supply voltage and temperature for the ’221 are shown in Figures 4 and 5, respectively.
Pin assignments for these devices are identical to those of the SN54123/SN74123 or SN54LS123/SN74LS123
so that the ’221 or ’LS221 devices can be substituted for those products in systems not using the retrigger by
merely changing the value of Rext and/or Cext; however, the polarity of the capacitor must be changed.
The SN54221 and SN54LS221 are characterized for operation over the full military temperature range of –55
°C
to 125
°C. The SN74221 and SN74LS221 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each monostable multivibrator)
INPUTS
OUTPUTS
CLR
A
B
Q
L
X
L
H
X
HX
L
H
X
XL
L
H
L
H
H
L
H
Pulsed-output patterns are tested during
AC switching at 25
°C with Rext = 2 k,and
Cext = 80 pF.
This condition is true only if the output of
the latch formed by the two NAND gates
has been conditioned to the logic 1 state
prior to CLR going high. This latch is
conditioned by taking either A high or
B low while CLR is inactive (high).
相關(guān)PDF資料
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