- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384925 > SMS45GCR04 (Summit Microelectronics, Inc.) Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory PDF資料下載
參數(shù)資料
| 型號(hào)： | SMS45GCR04 |
| 廠商： | Summit Microelectronics, Inc. |
| 英文描述： | Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| 中文描述： | 四可編程精密級(jí)聯(lián)序列和監(jiān)督控制器4K的位的非易失性內(nèi)存 |
| 文件頁(yè)數(shù)： | 15/20頁(yè) |
| 文件大小： | 993K |
| 代理商： | SMS45GCR04 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)當(dāng)前第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)
15
2079 1.2 05/24/04
SMS45
SUMMIT MICROELECTRONICS, Inc.
Preliminary Information
Figure 11. Read and Write Operations
The high order bits of the address byte remain constant.
Should the Master transmit more than 16 bytes, prior to
generating the Stop condition, the address counter will
rollover and the previously written data will be overwrit-
ten. As with the byte Write operation, all inputs are disabled
during the internal Write cycle. Refer to Figure 11 for the
address, Acknowledge, and data transfer sequence.
N
A
C
K
N
A
C
K
Typical Write Operation
(Standard memory device type)
S
T
A
R
T
A
C
K
B
A
2
B
A
1
A
8
R
/
W
A
C
K
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
C
K
S
T
O
P
Master
SDA
Slave
0
1
1 0
A
C
K
R
/
W
A
C
K
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
C
K
S
T
O
P
S
T
A
R
T
Writing Configuration Registers
Master
SDA
Slave
0 1
1 0
Master
SDA
Slave
Device Type
Address
Bus
Address
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
A
C
K
R
/
W
A
C
K
S
T
A
R
T
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
Reading the Configuration Register
0 1
1 0
A
C
K
R
/
W
S
T
O
P
S
T
A
R
T
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0 1
1 0
Up to 15
additional bytes
can be written
before issuing
the stop.
B
A
2
B
A
1
X
B
A
2
B
A
1
X
B
A
2
B
A
1
X
2047 Fig11
Typical Reading Operation
(Alternate memory device type)
Master
SDA
Slave
A
C
K
R
/
W
A
C
K
S
T
A
R
T
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
1 1
1 0
A
C
K
R
/
W
S
T
O
P
S
T
A
R
T
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1 1
1 0
B
A
2
B
A
1
A
8
B
A
2
B
A
1
A
8
I
2
C PROGRAMMING INFORMATION (CONTINUED)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SMS45GCR05 | Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| SMS45GCR06 | Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| SMS45GCR07 | Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| SMS45GR00 | Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| SMS45GR01 | Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SMS45GCR05 | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| SMS45GCR06 | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| SMS45GCR07 | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| SMS45GR00 | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| SMS45GR01 | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。