參數(shù)資料
型號: SMM766
廠商: Summit Microelectronics, Inc.
英文描述: Six-Channel Active DC Output Controller, Monitor, Marginer and Sequencer with Sequence-Link⑩
中文描述: 六通道有源直流輸出控制器,監(jiān)視器,Marginer和音序器的序列連接⑩
文件頁數(shù): 11/32頁
文件大小: 970K
代理商: SMM766
SMM766
Preliminary Information
Summit Microelectronics, Inc
2086 2.1 12/13/2005
11
Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND. See Figure 5
and 6 Timing diagrams.
Symbol
Description
T
DPON
= 0.64MS
T
DPON
= 12.5MS
T
DPOFF
= 25MS
PUP
Y
active
T
DPOFF
= 50MS
T
DPOFF
= 0.64MS
t
DPOFF
from VM
X
off to PUP
Y
inactive
T
DPOFF
= 12.5MS
T
PRTO
= 0.64MS
T
PRTO
= 25MS
T
PRTO
= 100MS
T
PRTO
= 200MS
T
STT
= OFF
T
STT
= 100MS
T
STT
= 200MS
termination timer
T
STT
= 400MS
Time from restart timer
expiration to PUP
Y
active
after a fault-triggered power-
off or force-shutdown.
Fault-triggered restart delay
accuracy
Time from restart timer
expiration to PUP
Y
active
after command-triggered
power-off or force-shutdown.
Command-triggered restart delay
accuracy
Time for ADC conversion of
all 11 channels
Update period for ADOC of
channels
A – F
Slow Margin, + 10% change
in voltage with 0.1% ripple
TRIM_CAP=1
μ
F
t
MARGIN
Margin Time from Nominal
Fast Margin, + 10% change
in voltage with 0.1% ripple
TRIM_CAP=1
μ
F
Conditions
Min
Typ
Max
Unit
t
DPON
Programmable power-on delay
from restart timer expiration to
-25
t
DPON
+25
%
Programmable power-off delay
-25
t
DPOFF
+25
%
t
PRTO
Programmable reset time-out delay
-25
t
PRTO
+25
%
t
STT
Programmable sequence
-25
t
STT
+25
%
t
FTRD
Fault-triggered restart delay
2.4
s
t
FTRD
ACC
-25
t
FTRD
+25
%
t
CTRD
Command-triggered restart delay
12.5
ms
t
CTRD
ACC
-25
t
CTRD
+25
%
T
ADC
10-bit ADC sampling period
2.0
ms
T
DC_CONTROL
ADOC sampling period
1.7
ms
850
ms
85
ms
AC OPERATING CHARICTERISTICS
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