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參數(shù)資料
| 型號： | SMM665BFR9 |
| 廠商： | Summit Microelectronics, Inc. |
| 英文描述： | Six-Channel Active DC Output Controller, Monitor, Marginer and Sequencer |
| 中文描述： | 六通道有源直流輸出控制器，監(jiān)視器，Marginer和音序器 |
| 文件頁數(shù)： | 15/30頁 |
| 文件大?。?/td> | 872K |
| 代理商： | SMM665BFR9 |
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SMM665B
Preliminary Information
Summit Microelectronics, Inc
2089 1.1 10/20/04
15
While the SMM665B is in the Power-on sequencing
mode the RST output is held active and the HEALTHY
output is held inactive regardless of trigger sources
(Figure 8). The Power-off and Force Shutdown trigger
options are also disabled while in this mode.
Furthermore, the SMM665B will not respond to activity
on the PWR_ON/OFF pin or to a Power-off I
2
C
command during Power-on sequencing mode.
ONGOING OPERATIONS-MONITORING MODE
During ongoing operations mode, the part can (1)
monitor (2) actively control via ADOC, and (3) use
force shutdown if necessary.
Once the Power-on sequence is complete and before
a Power-off sequence has been initiated, the
SMM665B continues to monitor all VM
X
inputs, the
VDD and 12VIN inputs, and two temperature sensor
inputs with a 10-bit ADC. Each of these inputs is
sampled and converted by the ADC every 2ms. The
ADC input has a range of 0V to four times the voltage
on VREF_ADC for inputs VM
A-F
and the VDD input.
The range is extended to 12 times VREF_ADC for the
12VIN input and is reduced to two times VREF_ADC
for the AIN1 and AIN2 inputs.
The SMM665B monitors internal temperature using
the 10-bit ADC and the automonitor function. Two
under temperature and two over temperature
thresholds
can
be
set,
programmable
trigger
options
conversion before trigger counter. Resolution is 0.25 C
per bit scaled over the range of -128 C to 127.75 C.
The temperature value can be acquired over the I
2
C
bus as a 10-bit signed two's complement value.
The SMM665B compares each resulting ADC
conversion with two programmable 10-bit under-
voltage limits (UV1, UV2) and two programmable 10-
bit
over-voltage
limits
corresponding input. A consecutive conversion
counter is used to provide filtering of the ADC inputs.
Each limit can be programmed to require 1, 2, 4 or 6
consecutive out-of-limit conversions before it is said to
be in fault. One in-limit conversion will remove the
fault from the threshold limit. This provides digital
filtering of the monitored inputs. The ADC inputs VM
A-
F
can use additional filtering by connecting a capacitor
from the corresponding CAP
X
pins to ground to form
an analog RC filter (R=25k
). The input is considered
to be in a fault condition if any of its limit thresholds
are in fault. Setting an OV threshold limit to full-scale
(3FF
HEX
), or setting an UV threshold limit to 000
HEX
ensures that the limit can never be in fault.
each
with
its
own
and
consecutive
(OV1,
OV2)
for
the
The status registers provide the real-time status of all
monitored inputs.
The voltage threshold limits for inputs VM
A-F
, VDD and
12VIN can be programmed to trigger the RST and
HEALTHY outputs as well as a Force Shutdown and
Power-off operation when exceeded. The threshold
limits for the internal temperature sensor and the AIN1
and AIN2 inputs can be programmed to trigger the
RST, HEALTHY, and FAULT outputs.
The HEALTHY and FAULT outputs of the SMM665B
are active as long as the triggering limit remains in a
fault condition. The RST output also remains active as
long as the triggering limit remains in a fault condition;
however, once the trigger source goes away the RST
will remain active for a reset timeout period (t
PRTO
).
TEMPERATURE SENSOR ACCURACY
The internal temperature sensor accuracy is ±5
o
C from
-40 to +90
o
C. The sensor measures the temperature
of the SMM665B die and the ambient temperature. If
VDD is at 5V, the die temperature is +2
C and at 12V,
it is +4
C. In order to calculate this difference in
specific applications measure the Vdd or 12VIN supply
current and calculate the power dissipated and
multiply by 80
o
C/W. For instance, 5V and 5mA is
25mW, which creates a 2
o
C offset.
MARGINING
The SMM665B has two additional Active DC Output
Control voltage settings for channels A-F; margin high
and margin low. The margin high and margin low
voltage settings can range from 0.3V to VDD of the
converters’ nominal output voltage depending on the
specified margin range of the DC-DC converter.
These settings are stored in the configuration registers
and are loaded into the Active DC Control voltage
setting by margin commands issued via the I
2
C bus.
The channel must be enabled for Active DC Control in
order to enable margining. The margin command
registers contain two bits for each channel that decode
the commands to margin high, margin low, or control
to the nominal setting. Therefore, any combination of
margin high, margin low, and nominal control is
allowed in the margining mode.
Once the SMM665B receives the command to margin
the supply voltages, it begins adjusting the supply
voltages to move toward the desired setting. When all
channels are at their voltage setting, a bit is set in the
margin status registers.
APPLICATIONS INFORMATION (CONTINUED)
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