參數(shù)資料
型號(hào)： SMM150ER00
廠商： Summit Microelectronics, Inc.
英文描述： Single-Channel Supply Voltage Marginer/Monitor
中文描述： 單通道電源電壓Marginer /監(jiān)視器
文件頁(yè)數(shù)： 4/22頁(yè)
文件大?。?/td> 388K
代理商： SMM150ER00
SMM150
Preliminary Information
Summit Microelectronics, Inc
2075 2.6 05/13/05
4
PIN DESCRIPTIONS
QFN
Pad
Number
Ultra
CSP
TM
Ball
Number
Pin
Type
Pin Name
Pin Description
28
B2
I/O
SDA
I
2
C Bi-directional data line
1
A1
I
SCL
I
2
C clock input.
2
B1
I
A2
4
C1
I
A1
6
D1
I
A0
The address pins are biased either to VDD, GND or left floating. This
allows for a total of 21 distinct device addresses. When
communicating with the SMM150 over the 2-wire bus these pins
provide a mechanism for assigning a unique bus address.
8
D2
I
WP
Programmable Write Protect active high/low input. When asserted,
writes to the configuration registers and general purpose EE are not
allowed. The WP input is internally tied to VDD with a 50K
resistor.
10
E2
CAP
CAPM
External capacitor input used to filter the VM input, 0.2
μ
F.
20
B3
O
TRIM
Output voltage used to control and/or margin converter voltages.
Connect to the converter trim input.
14
E4
I
VM
Voltage monitor input. Connect to the DC-DC converter positive sense
line or its’ +Vout pin.
21
A4
PWR
VDD
Power supply of the part.
23
A3
PWR
VDD_CAP
External capacitor input used to filter the internal VDD supply rail.
7
E1
GND
GND
Ground of the part. The SMM150 ground pin should be connected to
the ground of the device under control or to a star point ground. PCB
layout should take into consideration ground drops.
24
C3
I
MUP
Margin up command input. Asserted high. The MUP input is internally
tied to VDD with a 50K
resistor.
Margin down command input. Asserted high. The MDN input is
internally tied to VDD with a 50K
resistor.
25
A2
I
MDN
19
B4
I
COMP1
12
E3
I
COMP2
COMP1 and COMP2 are high impedance inputs, each connected
internally to a comparator and compared against the internally
programmable VREF voltage. Each comparator can be independently
programmed to monitor for UV or OV. The monitor level is set
externally with a resistive voltage divider.
11
D3
O
FAULT#
When either of the COMP1 or COMP2 inputs are in fault the open-
drain FAULT# output will be pulled low. A configuration option exists
to disable the FAULT# output while the device is margining.
5
C2
I/O
READY
Programmable active high/low open drain output indicates that VM is
at its set point. When programmed as an active high output, READY
can also be used as an input. When pulled low, it will latch the state of
the comparator inputs.
3, 9, 13,
15-18,
22, 26,
27, 29
C4, D4
NC
NC
No Connect. The bottom side metal plate (Pad 29) can be connected
to GND or left floating.
相關(guān)PDF資料
PDF描述
SMM150ER01 Single-Channel Supply Voltage Marginer/Monitor
SMM150ER02 Single-Channel Supply Voltage Marginer/Monitor
SMM150ER03 Single-Channel Supply Voltage Marginer/Monitor
SMM465FCR02 4-Channel Active DC Output Controller, Monitor, Marginer and Sequencer
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SMM150ER01 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Single-Channel Supply Voltage Marginer/Monitor
SMM150ER02 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Single-Channel Supply Voltage Marginer/Monitor
SMM150ER03 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Single-Channel Supply Voltage Marginer/Monitor
SMM150ER04 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Single-Channel Supply Voltage Marginer/Monitor
SMM150ER05 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Single-Channel Supply Voltage Marginer/Monitor
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