參數(shù)資料
型號: SM79164C35J
廠商: 新茂國際科技股份有限公司
英文描述: 8 - Bit Micro-controller with 64KB flash & 4KB RAM embedded
中文描述: 8 -位微控制器,64KB閃存
文件頁數(shù): 13/25頁
文件大小: 466K
代理商: SM79164C35J
Specifications subject to change without notice,contact your sales representatives for the most recent information.
13/26
Ver 2.1
SM79164 08/2006
SyncMOS Technologies International. Inc. SM79164
Watch Dog Timer Register - System Control Register (SCONF, $BF)
The bit 7 (WDR) of SCONF is Watch Dog TImer Reset bit. It will be set to 1 when reset signal generated by WDT
overflow. User should check WDR bit whenever un-predicted reset happened
4. Reduce EMI Function
The SM79164 allows user to reduce the EMI emission by setting 1 to the bit 0 (ALEI) of SCONF register. This function will
inhibit the clock signal in Fosc/6Hz output to the ALE pin.
5. Pulse Width Modulation (PWM)
The Pulse Width Modulation (PWM) module contains 1 kind of PWM sub module: PWM. PWM also has four 8-bit channels.
5.1 PWM Function Description:
Each PWM channel contains a 8-bit wide PWM data register (PWMDR) to decide number of continuous pulses within a
PWM frame cycle. The value programmed in the register will determine the pulse length of the output. The PWM channel
can be configured as 5-bit or 8-bit resolution. If a channel is configured as 5-bit resolution, only LSB 5 bits are available.
The value of each PWM Data Register (PWMDR) is continuously compared with the content of an internal counter to deter-
mine the state of each PWM channel output pin.
5.2 PWM Registers - P1CON[7:0], PWMC[7:0], PWMD[7:0]
PWM Registers - Port1 Configuration Register (P1CON, $9B)
PWM[7:0]E: When the bit set to one, the corresponding PWM pin is active as PWM function. When the bit reset to zero, the
corresponding PWM pin is active as I/O pin. Five bits are cleared upon reset.
PWM Registers - PWM Control Register (PWMC[7:0], $DE ~ $DB, $D6 ~ $D3)
bit-7
WDR
R/W
0
bit-0
ALEI
R/W
0
Unused
-
*
Unused
-
*
Unused
-
*
Unused
-
*
Unused
-
*
OME
R/W
0
Read / Write:
Reset value:
PWME7
R/W
0
PWME6
R/W
0
PWME5
R/W
0
PWME4
R/W
0
PWME3
R/W
0
PWME2
R/W
0
PWME1
R/W
0
PWME0
R/W
0
Read / Write:
Reset value:
bit-7
Unused
-
*
bit-0
Unused
-
*
Unused
-
*
Unused
-
*
Unused
-
*
PBS[7:0]
R/W
0
PFS[7:0]1
R/W
0
PFS[7:0]0
R/W
0
Read / Write:
Reset value:
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