參數(shù)資料
型號: SM5K3
廠商: Sharp Corporation
英文描述: 4-Bit Single-Chip Microcomputers(Controllers With 10-Bit A/D Converter)
中文描述: 4位單片機(控制器位A / D轉換器10)
文件頁數(shù): 14/28頁
文件大?。?/td> 233K
代理商: SM5K3
SM5K3/SM5K4/SM5K5
- 14 -
FUNCTIONAL DESCRIPTION
Hardware Reset Function
Reset function initializes the SM5K3/5K4/5K5
systems. When the input on the RESET pin goes
Low, the system enters reset condition after 2
command cycles. After the RESET pin goes High
level, the reset condition is removed as the input
pulse from OSC
IN
pin repeats 2
15
times, forcing the
program counter to start at 0 page and 0 address.
Initialized status of the system immediately after
resetting is shown below.
Reset causes the following changes.
1) I/O pins are set input.
2) All mode registers are reset.
3) Output latch register P0 is reset, causing P0
0
to
P0
3
pins go High level.
4) Interrupt request flags (IFA, IFB, and IFT),
interrupt master enable flag (IME) are reset,
disabling all interrupts.
Standby Feature
The standby function saves power by stopping the
program whenever it is not necessary to run. The
mode in which the microcomputer is executing the
program is called the run mode and the mode in
which it stops the program is called the standby
mode. Standby mode is further divided into two
modes : stop mode and halt mode, one of which is
selected by halt instruction or stop instruction. Upon
removal of standby condition, the SM5K3/5K4/5K5
return from the standby mode to the normal run
mode. To enter the standby mode, select either
stop mode or halt mode whichever is appropriate
(Fig. 8).
Table 2 Status of Flags and Registers Immediately after Reset
FLAG REGISTER
STATUS
0
Level 1
Undefined
Register A
Undefined
Register X
Undefined
P0, P2, P4, P5 output latch register
Timers (RA, RB), divider
FLAG REGISTER
STATUS
0
0
0
0
Undefined
Undefined
0
PC
SP
RAM
IFA flag
IFB flag
IFT flag
IME flag
C flag
B
M
, B
L
registers, SB register
R3, R8
, R9, RC, RE, RF
0
0
The content of the bit R84 is undefined because it is read only.
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