參數(shù)資料
型號： SM320C6416DGADW60
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號處理
英文描述： 64-BIT, 75 MHz, OTHER DSP, CPGA570
封裝： 33 X 33 MM, CERAMIC, FCPGA-570
文件頁數(shù)： 129/134頁
文件大?。?/td> 1997K
代理商： SM320C6416DGADW60
SMJ320C6414, SMJ320C6415, SMJ320C6416
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SGUS050A JANUARY 2004 REVISED MARCH 2004
94
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
SYNCHRONOUS DRAM TIMING (CONTINUED)
timing requirements for synchronous DRAM cycles for EMIFB module (see Figure 27)
NO.
MIN
MAX
UNIT
6
tsu(EDV-EKO1H)
Setup time, read EDx valid before ECLKOUTx high
2.1
ns
7
th(EKO1H-EDV)
Hold time, read EDx valid after ECLKOUTx high
2.5
ns
These C64x devices have two EMIFs (EMIFA and EMIFB). All EMIFA signals are prefixed by an “A” and all EMIFB signals are prefixed by a
“B”. Throughout the rest of this document, in generic EMIF areas of discussion, the prefix “A” or “B” may be omitted [e.g., the synchronous DRAM
memory access signals are shown as generic ( SDCAS, SDWE, and SDRAS ) instead of ASDCAS, ASDWE, and ASDRAS (for EMIFA) and
BSDCAS, BSDWE, and BSDRAS (for EMIFB)].
switching characteristics over recommended operating conditions for synchronous DRAM cycles
for EMIFB module (see Figure 27Figure 34)
NO.
PARAMETER
MIN
MAX
UNIT
1
td(EKO1H-CEV)
Delay time, ECLKOUTx high to CEx valid
1.3
6.4
ns
2
td(EKO1H-BEV)
Delay time, ECLKOUTx high to BEx valid
6.4
ns
3
td(EKO1H-BEIV)
Delay time, ECLKOUTx high to BEx invalid
1.3
ns
4
td(EKO1H-EAV)
Delay time, ECLKOUTx high to EAx valid
6.4
ns
5
td(EKO1H-EAIV)
Delay time, ECLKOUTx high to EAx invalid
1.3
ns
8
td(EKO1H-CASV)
Delay time, ECLKOUTx high to SDCAS valid
1.3
6.4
ns
9
td(EKO1H-EDV)
Delay time, ECLKOUTx high to EDx valid
6.4
ns
10
td(EKO1H-EDIV)
Delay time, ECLKOUTx high to EDx invalid
1.3
ns
11
td(EKO1H-WEV)
Delay time, ECLKOUTx high to SDWE valid
1.3
6.4
ns
12
td(EKO1H-RAS)
Delay time, ECLKOUTx high to SDRAS valid
1.3
6.4
ns
13
td(EKO1H-ACKEV)
Delay time, ECLKOUTx high to ASDCKE valid (EMIFA only)
1.3*
6.4*
ns
14
td(EKO1H-PDTV)
Delay time, ECLKOUTx high to PDT valid
1.3
6.4
ns
*This parameter is not production tested.
These C64x devices have two EMIFs (EMIFA and EMIFB). All EMIFA signals are prefixed by an “A” and all EMIFB signals are prefixed by a
“B”. Throughout the rest of this document, in generic EMIF areas of discussion, the prefix “A” or “B” may be omitted [e.g., the synchronous DRAM
memory access signals are shown as generic ( SDCAS, SDWE, and SDRAS ) instead of ASDCAS, ASDWE, and ASDRAS (for EMIFA) and
BSDCAS, BSDWE, and BSDRAS (for EMIFB)].
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