參數(shù)資料
型號(hào): SLE4432C
廠商: SIEMENS A G
元件分類: DRAM
英文描述: ICs for Chip Cards Intelligent 256-Byte EEPROM
中文描述: 256 X 8 I2C/2-WIRE SERIAL EEPROM, UUC
封裝: DIE
文件頁數(shù): 25/35頁
文件大?。?/td> 1011K
代理商: SLE4432C
SLE 4432
SLE 4442
Semiconductor Group
23
2.5
Reset Modes
Reset and Answer-to-Reset (compare 2.2.1)
Power on Reset
After connecting the operating voltage to VCC, I/O is high impedance Z. By all means, a read
access to any address or an Answer-to-Reset must be carried out before data can be altered.
2.6
Break
If RST is set to high during CLK in state L any operation is aborted and I/O is switched to high
impedance Z. Minimum duration of
t
RES
= 5
μ
s is necessary to trigger a defined valid reset. After
Break the chip is ready for further operations.
2.7
Failures
Behavior in case of failures:
In case of one of the following failures, the chip sets the I/O to high impedance Z after 8 clock pulses
at the latest.
Possible failures:
– Comparison unsuccessful
– Wrong command
– Wrong number of command clock pulses
– Write/erase access to already protected bytes
– Rewriting and erasing of a bit in the protection memory
2.8
Coding of the Chip
Due to security purposes every chip is irreversibly coded by a scheme. By this way fraud and
misuse is excluded. The relevant data are programmed in the memory area from address 0 to 31.
Afterwards the associated protection bits are programmed. As an example,
figures 12
and
13
show
ATR and Directory Data of Structure 1. When delivered, ATR header, ICM and ICT are
programmed. Siemens programs also the AID. The AID (Application IDentifier) consists of 5 byte
RID (Registered application provider IDentifier) administered by a national registration authority and
of up to 11 byte PIX (Proprietary application Identifier eXtension). There are two possibilities: the
customers AID or Siemens AID (only for sample quantities). Depending on the agreement between
the customer and Siemens ICCF can be also programmed before delivery.
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