參數(shù)資料
型號(hào)： SLB128B
廠商： National Semiconductor Corporation
英文描述： Transmitter with built-in scaler for LVDS Display Interface (LDI)
中文描述： 發(fā)射器內(nèi)置的LVDS顯示接口（低密度脂蛋白縮放）
文件頁數(shù)： 44/48頁
文件大?。?/td> 650K
代理商： SLB128B
Applications Information
(Continued)
4. To configure for dual pixel in to dual pixel out application
using the DS90C2501 with DS90CF364 or DS90CF364A or
DS90CF366, the “DUAL” pin must be set to V
CC
. In this
mode, outputs A0-to-A7, and CLK1, CLK2 are enabled. Do
note that scaler will be shut down in this configuration.
Board Layout and Thermal Considerations for the
DS90C2501
Note: The thermal information listed in this document is
based on preliminary simulation results and subject to
change.
The thermal enhancement features of the (CSP) chip scale
package require special considerations and guidelines to be
observed to insure optimal thermal performance in applica-
tions were the cooling method is free-air convection.
The CSP128 package has a 5X5 matrix of thermal pads
designed to efficiently conduct heat from the device to the
plane of the printed circuit board. The package requires this
thermal connection to increase the effective surface area of
the package to maintain safe operating die temperatures.
The vias of the thermal pads should be connected to the
board’s ground plane having a minimum effective area of
2000 mm
2
.
For more complex system thermal design situations, it is
recommended that system level thermal analysis tools be
utilized to insure the maximum junction temperature is not
exceeded.
The graph in
Figure 24
shows the expected junction tem-
perature for a given plane area under varying ambient tem-
perature conditions.
Figure 25
shows the recommended
PCB footprint for the DS90C2501. The following assump-
tions were used:
Board Thickness = 1.6mm
Board Area = 7742 sq. mm
Copper Plane = 1 oz.
Number of layers = 4
Signal Trace Length = 25.4mm
Maximum Junction Temperature = +150C
Package
θ
JA
= 31.7C/W (Natural Convection)
The example does not take heating effects from adjacent
system components into consideration.
Pd (max) = 1.8W*
*(scaler on, SXGA to SXGA+ scaling, single in -dual output
port mode, V
DD
2.5 +10%, V
DD
3.3 +10%, max. process
variation)
As a final design verification, the temperature at the top-
center of the case (T
CASE
) should not exceed 97C.
Junction Temperature vs. Plane Area
20004570
FIGURE 24. Junction Temperature vs. Ground Plane Area
D
www.national.com
44
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