參數(shù)資料
型號: SLA 24C02
廠商: SIEMENS AG
元件分類: DRAM
英文描述: 2Kbit (256 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(2K位(256 ×8 位)串行CMOS-EEPROM)
中文描述: 2Kbit(256 × 8位)串行的CMOS EEPROM,帶有國際進(jìn)口同步2線巴士(2K位(256 × 8位)串行的CMOS EEPROM的)
文件頁數(shù): 16/28頁
文件大小: 356K
代理商: SLA 24C02
SLx 24C01/02/P
Semiconductor Group
16
1999-02-02
7
Reading of the EEPROM data is initiated by the Master with the command byte CSR.
Read Operations
7.1
Random read operations allow the master to access any memory location.
Random Read
Figure 11
Random Read
Address Setting
The master generates a START condition followed by the
command byte CSW. The receipt of the CSW-byte is
acknowledged by the EEPROM with a low on the SDA line.
Now the master transmits the EEPROM address (EEA) to the
EEPROM and the internal address counter is loaded with the
desired address.
After the acknowledge for the EEPROM address is received,
the master generates a START condition, which terminates
the initiated write operation. Then the master transmits the
command byte CSR for read, which is acknowledged by the
EEPROM.
During the next eight clock pulses the EEPROM transmits the
data byte and increments the internal address counter.
During the following clock cycle the masters releases the bus
and then transmits the STOP condition.
Transmission of CSR
Transmission of
EEPROM Data
STOP Condition from
Master
Command Byte
CSW
S
P
A
C
K
C
K
A
S
T
A
R
T
T
O
P
S
EEPROM Address
EEA n
Bus Activity
Master
SDA Line
Bus Activity
EEPROM
IED02133
C
K
A
Data Byte
1
0
S
T
R
A
T
S
CSR
Command Byte
相關(guān)PDF資料
PDF描述
SLE 24C01 1Kbit (128 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(1 K位(128 ×8 位)串行CMOS-EEPROM)
SLE 24C02 2Kbit (256 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(2K位(256 ×8 位)串行CMOS-EEPROM)
SLA 24C04 4 Kbit (512 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(4K位 (512 ×8 位)CMOS串行EEPROM(帶IIC控制))
SLE 24C04 4 Kbit (512 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(4K位 (512 ×8 位)CMOS串行EEPROM(帶IIC控制))
SLA 24C08 8Kbit (1024 × 8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(8K位 (1024 × 8 位) CMOS串行EEPROM(帶IIC控制))
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