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參數(shù)資料
| 型號： | SLA 24C02 |
| 廠商： | SIEMENS AG |
| 元件分類： | DRAM |
| 英文描述： | 2Kbit (256 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(2K位(256 ×8 位)串行CMOS-EEPROM) |
| 中文描述： | 2Kbit（256 × 8位）串行的CMOS EEPROM，帶有國際進(jìn)口同步2線巴士（2K位（256 × 8位）串行的CMOS EEPROM的） |
| 文件頁數(shù)： | 12/28頁 |
| 文件大?。?/td> | 356K |
| 代理商： | SLA 24C02 |
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SLx 24C01/02/P
Semiconductor Group
12
1999-02-02
6
Changing of the EEPROM data is initiated by the master with the command byte CSW.
Depending on the state of the Write Protection pin WP and of the Protection Bits (refer
to
chapter 7
Page Protection Mode
TM
) either one byte (Byte Write) or up to 8 bytes (Page
Write) are modified in one programming procedure.
Write Operations
6.1
Byte Write
Figure 7
Byte Write Sequence
The erase/write cycle is finished latest after 8 ms. Acknowledge polling may be used for
speed enhancement in order to indicate the end of the erase/write cycle (refer to
chapter 6.3
Acknowledge Polling).
Address Setting
After a START condition the master transmits the Chip Select
Write byte CSW. The EEPROM acknowledges the CSW byte
during the ninth clock cycle. The following byte with the
EEPROM address (A0 to A6 or A7) is loaded into the address
counter of the EEPROM and acknowledged by the EEPROM.
Finally the master transmits the data byte which is also
acknowledged by the EEPROM into the internal buffer.
Then the master applies a STOP condition which starts the
internal programming procedure. The data bytes are written in
the memory location addressed in the EEA byte (A0 to A6 or
A7). The programming procedure consists of an internally
timed erase/write cycle. In the first step, the selected byte is
erased to
“1”. With the next internal step, the addressed byte
is written according to the contents of the buffer.
Transmission of Data
Programming Cycle
Command Byte
CSW
S
P
C
K
A
C
K
A
S
T
A
R
T
T
O
P
S
EEPROM Address
EEA
Data Byte
Bus Activity
Master
SDA Line
Bus Activity
EEPROM
IED02129
C
K
A
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SLE 24C01 | 1Kbit (128 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(1 K位(128 ×8 位)串行CMOS-EEPROM) |
| SLE 24C02 | 2Kbit (256 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(2K位(256 ×8 位)串行CMOS-EEPROM) |
| SLA 24C04 | 4 Kbit (512 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(4K位 (512 ×8 位)CMOS串行EEPROM(帶IIC控制)) |
| SLE 24C04 | 4 Kbit (512 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(4K位 (512 ×8 位)CMOS串行EEPROM(帶IIC控制)) |
| SLA 24C08 | 8Kbit (1024 × 8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(8K位 (1024 × 8 位) CMOS串行EEPROM(帶IIC控制)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SLA24C02-D | 制造商:Siemens 功能描述:256 X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8 |
| SLA24C02-D/P | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1/2 Kbit 128/256 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| SLA24C02-D-3 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1/2 Kbit 128/256 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| SLA24C02-D-3/P | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1/2 Kbit 128/256 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| SLA24C02-S | 制造商:Infineon Technologies AG 功能描述:SLA24C02 SO-8 |
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