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參數(shù)資料
| 型號： | SL15102DI-XXX |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | OTHER CLOCK GENERATOR, DSO8 |
| 封裝： | 3 X 3 MM, 0.75 MM HEIGHT, ROHS COMPLIANT, TDFN-8 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 308K |
| 代理商： | SL15102DI-XXX |
Rev 1.0, October 3, 2008
Page 10 of 12
SL15102
External Components and Design Considerations
Typical Application Circuit
Comments and Recommendations
Decoupling Capacitor:
A decoupling capacitor of 0.1μF must be used between VDD pins and VSS pin. Place the
capacitor on the component side of the PCB as close to the VDD pins as possible. The PCB trace to the VDD pin
and to the GND via should be kept as short as possible Do not use vias between the decoupling capacitor and the
VDD pins.
Series Termination Resistor
: A series termination resistor is recommended if the distance between the outputs
(CLKOUT1/2/3 pins) and the load if PCB trace is over 1 inch. The nominal impedance of the outputs is about 24 .
Use 22 resistors in series with the outputs to terminate 50 trace impedance and place 22 resistors as close to
the outputs as possible.
Crystal and Crystal Load:
Use only parallel resonant fundamental crystals. DO NOT USE higher overtone crystals.
To meet the crystal initial accuracy specification (in ppm); the internal on-chip programmable capacitors PCin and
PCout must be programmed to match the crystal load requirement. These values are given by the formula below:
PCxin(pF) = PCxout(pF) = [2CL(pF) – Cp(pF)]
Where CL is crystal load capacitor as given by the crystal datasheet and Cp(pF) is the compensation factor for the
total parasitic capacitance at XIN or XOUT pin including PCB related parasitic capacitance.
As an example; if a crystal with CL=18pF is used and Cp=2pF, by using the above formula, PCin=PCout=(2x18)-(2)
= 34pF. Programming PCxin and PCxout to 34pF assures that this crystal sees an equivalent load of 18pF and no
other external crystal load capacitor is needed. Deviating from the crystal load specification could cause an increase
in frequency accuracy in ppm.
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