參數(shù)資料
型號(hào): PDM31096LL100ST
元件分類: SRAM
英文描述: 512K X 8 STANDARD SRAM, 100 ns, PDSO32
文件頁(yè)數(shù): 2/8頁(yè)
文件大?。?/td> 285K
代理商: PDM31096LL100ST
PDM31096LL
2
Rev. 0.0 - 3/31/98
PRELIMINARY
Truth Table
NOTE: H = VIH, L = VIL, X = DON’T CARE
Absolute Maximum Ratings (1)
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specication is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may affect reliability.
2. Appropriate thermal calculations should be performed in all cases and specically for
those where the chosen package has a large thermal resistance (e.g., TSOP). The
calculation should be of the form: Tj = Ta + P * θja where Ta is the ambient tempera-
ture, P is average operating power and
θ
ja the thermal resistance of the package. For
this product, use the following
θ
ja values:
SOJ: 78 oC/W
TSOP: 112 oC/W
OE
WE
CE
I/O
MODE
X
H
Hi-Z
Standby
X
Hi-Z
Standby
LH
L
DOUT
Read
XL
L
DIN
Write
H
L
Hi-Z
Output Disable
Symbol
Rating
Com’l.
Ind.
Unit
VTERM
Terminal Voltage with Respect to Vss
–0.5 to +4.6
V
TBIAS
Temperature Under Bias
–55 to +125
–65 to +135
°C
TSTG
Storage Temperature
–55 to +125
–65 to +150
°C
PT
Power Dissipation
1.0
W
IOUT
DC Output Current
20
mA
Tj
Maximum Junction Temperature (2)
125
°C
A11
A9
A8
A13
WE
A17
A15
Vcc
A18
A16
A14
A12
A7
A6
A5
A4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
Vss
I/O2
I/O1
I/O0
A0
A1
A2
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Congurations
TSOP (I), STSOP (I)
Pin Description
Name
Description
A18-A0
Address Inputs
I/O7-I/O0
Data Inputs/Outputs
OE
Output Enable Input
WE
Write Enable Input
CE
Chip Enable Input
VCC
Power (+3.3V)
VSS
Ground
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