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參數(shù)資料
| 型號： | SI9117 |
| 廠商： | Vishay Intertechnology,Inc. |
| 英文描述： | High-Frequency Converter for Telecom Applications |
| 中文描述： | 高頻轉(zhuǎn)換器的電信應(yīng)用 |
| 文件頁數(shù)： | 12/15頁 |
| 文件大?。?/td> | 132K |
| 代理商： | SI9117 |
Si9117
Vishay Siliconix
www.vishay.com
12
Document Number: 70027
S-40750—Rev. E, 19-Apr-04
During slave mode, the unused C
T
pin should be connected to
ground, and the R
T
to V
CC
.
V
IN
and V
DD
These pins are used for powering the Si9117 and should
consequently be well de-coupled. In selecting the right
de-coupling, the MOSFET gate drive requirements should be
considered, as the de-coupling capacitor will also have to
supply the required peak current. Generally speaking, the best
combination would be a 1- to 10- F electrolytic for bulk energy
and a 100-nF ceramic for high-frequency bypass. The V
CC
rail
should be carefully observed at the switch on and off
occurrences using ac de-coupling, and the peak voltage
spikes should be measured. These should be less than
200 mV. Excessive noise on the V
CC
will appear on other pins
and may cause instability or jitter on the control waveforms.
Switch
The switch FET is designed specifically for converters in the 5-
to 10-W power range. It has a 200-V V
DS
rating with 1- r
DS(on)
.
Using the Gate charge curve, for a gate drive of 12 V from the
Si9117, the total gate charge for 100-V V
DS
will be 10 nC.
From Q = i x t, it is easy to deduce that with a 400 mA internal
gate drive, a time of 50 ns will be obtained (see Figure 9).
20
0
4
8
12
16
16
12
8
4
0
Q
g
Total Gate Charge (nC)
G
V
DS
= 100 V
FIGURE 9.
Si9117 Internal MOSFET Gate Charge
Current Sense
The current sense comparator performs the current mode
control function by comparing the output of the error amplifier
(V
C
) with the current in the output inductor. It is impractical to
measure the output inductor current, but the rising slope of the
current can supply all the necessary information if sampled in the
MOSFET as a scaled equivalent. Certain precautions are
necessary, however, due to data distortion, noise, and the
rarity of ideal operating conditions.
Sensed current waveforms often have leading-edge spikes or
noise caused by reverse recovery of rectifiers, equivalent
capacitive loading on the secondary, and inductive circuit
effects. Inductive sense resistors must not be used, as they
cause large damaging spikes and distort the sensed
waveforms. These spikes can confuse the PWM comparator
into believing that an overload condition is present. In addition,
the Si9117 uses a single pin (
Vin) for all the return current
requirements, including the output driver. As a result, the
current pulse from the gate charge transfer into the MOSFET
will appear on the sense pin and be filtered out.
Waveform A (Figure 11) has an ideal textbook appearance,
but is in fact rarely encountered. Waveforms B and C are
typical yet close to the threshold limit, and thus could lead
to instability. The addition of a simple RC network on the
sensed waveform suppresses this leading-edge spike. The
low pass filter should be selected so that only the leading-edge
spike is suppressed and the overall waveform is not distorted.
The waveform must contain a clean rising slope for the error
amplifier to intersect. If the RC time constant is too long, then
the waveform will be distorted and lead to falling-edge jitter on
the turn-off edge.
Slope compensation can also be used to eliminate noise or
jitter. A sample of the oscillator voltage is superimposed on the
error amplifier to produce a clean crossing of the thresholds
and to avoid any hunting.
The Si9117 has built-in leading-edge blanking/ suppression to
eliminate some of the effects of these spikes.
The two comparators used to operate the circuit have different
delay times as follows:
The current mode comparator needs more noise immunity,
and therefore has a deliberately slower delay time to block
out noise and spikes which are present on the leading edge.
Typical delay times should be around 100 ns.
The peak current limiting comparator has the fastest
response time, since it is used only to protect the circuit in
the event of an overload. The delay times for this compara-
tor should be around 70 ns.
High-Frequency Design Requirements
When designing converters for high switching frequency, a
certain discipline is required to determine the right choice of
components. This process should be an iterative choice and
the board layout should be properly planned before CAD
layout is undertaken.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI9117DY | 功能描述:直流/直流開關(guān)轉(zhuǎn)換器 1MHz HV Sw Mode Reg RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關(guān)頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數(shù)量:2 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT |
| SI9117DY-E3 | 功能描述:開關(guān)變換器、穩(wěn)壓器與控制器 Hi Freq Converter For Telecom App RoHS:否 制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開關(guān)頻率:1 MHz 工作溫度范圍: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel |
| SI9117DY-T1 | 功能描述:直流/直流開關(guān)轉(zhuǎn)換器 Hi Freq Converter For Telecom App RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關(guān)頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數(shù)量:2 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT |
| SI9117DY-T1-E3 | 功能描述:開關(guān)變換器、穩(wěn)壓器與控制器 Hi Freq Converter For Telecom App RoHS:否 制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開關(guān)頻率:1 MHz 工作溫度范圍: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel |
| SI9118 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Programmable Duty Cycle Controller |
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