參數(shù)資料
型號: SI5600
廠商: Electronic Theatre Controls, Inc.
英文描述: SiPHY-TM OC-192/STM-64 SONET/SDH TRANSCEIVER
中文描述: SiPHY -商標(biāo)OC-192/STM-64的SONET / SDH收發(fā)器
文件頁數(shù): 23/28頁
文件大?。?/td> 365K
代理商: SI5600
Si5600
Preliminary Rev. 0.31
23
J13–14, K13–
14, L13–14,
M13–14, N3–
14, P3–14
TXDIN[15:0]+,
TXDIN[15:0]–
I
LVDS
Differential Parallel Data Input.
The 16-bit data word present on these pins is
multiplexed into a high speed serial stream and
output on TXDOUT. The data on these inputs is
clocked into the device by the rising edge of
TXCLK16IN.
K1, L1
TXDOUT+,
TXDOUT–
O
CML
Differential High Speed Data Output.
The 16-bit word input on TXDIN[15:0] is multi-
plexed into a high speed serial stream that is out-
put on these pins. Input data is multiplexed in
sequence from TXDIN0 to TXDIN15 with TXDIN0
transmitted first. This output is updated by the ris-
ing edge of TXCLKOUT.
M5
TXLOL
O
LVTTL
CMU Loss-of-Lock.
The output is asserted low when the CMU is not
phase locked to the selected reference source.
M9
TXMSBSEL
I
LVTTL
Data Bus Transmit Order.
For TXMSBSEL = 0, data on TXDIN[0] is trans-
mitted first followed by TXDIN[1] through
TXDIN[15].
For TXMSBSEL = 1, TXDIN[15] is transmitted
first followed by TXDIN[14] through TXDIN[0].
L3
TXREXT
External Bias Resistor.
This resistor is used by the transmitter circuitry to
establish bias currents within the device. This pin
must be connected to GND through a 3.09 k
(
1
%)
resistor.
M12
TXSQLCH
I
LVTTL
Transmit Data Squelch.
If TXSQLCH is asserted low, the output data
stream on TXDOUT will be forced to 0s. If
TXSQLCH = 1, TX squelching is turned off.
E5–10, F5–10,
G5–10, H5–10,
J5–10, K5–10
VDD
VDD
1.8 V
Supply Voltage.
Nominally 1.8 V.
Pin Number(s)
Name
I/O
Signal Level
Description
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