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參數(shù)資料
| 型號(hào)： | SI5600 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SiPHY-TM OC-192/STM-64 SONET/SDH TRANSCEIVER |
| 中文描述： | SiPHY -商標(biāo)OC-192/STM-64的SONET / SDH收發(fā)器 |
| 文件頁數(shù)： | 22/28頁 |
| 文件大?。?/td> | 365K |
| 代理商： | SI5600 |
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Si5600
22
Preliminary Rev. 0.31
D12
RXMSBSEL
I
LVTTL
Data Bus Receive Order.
This determines the order of the received data
bits on the output bus.
For RXMSBSEL = 0, the first data bit received is
output on RXDOUT[0] and following data bits are
output on RDOUT[1] through RXDOUT[15].
For RXMSBSEL = 1, the first data bit is output on
RXDOUT[15] and following data bits are output
on RXDOUT[14] through RXDOUT[0].
C11
RXREXT
External Bias Resistor.
This resistor is used by the receiver circuitry to
establish bias currents within the device. This pin
must be connected to GND through a 3.09 k
(
1
%)
resistor.
C9
RXSQLCH
I
LVTTL
Data Squelch.
When this input is low the data on RXDOUT is
forced to 0. Set high for normal operation.
C4
SLICELVL
I
Slicing Level Adjustment.
Applying an analog voltage to this pin allows
adjustment of the slicing level applied to the input
data eye. Tieing this input high nominally sets the
slicing offset to 0.
N1–2
TXCLK16IN+,
TXCLK16IN–
I
LVDS
Differential Data Clock Input.
The rising edge of this input clocks data present
on TXDIN into the device.
P1–2
TXCLK16OUT+,
TXCLK16OUT–
O
LVDS
Divided Down Output Clock.
This clock output is generated by dividing down
the high speed output clock, TXCLKOUT, by a
factor of 16. It is intended for use in counter
clocking schemes that transfer data between the
system ASIC and the Si5600.
K12
TXCLKDSBL
I
LVTTL
High Speed Clock Disable
When this input is high, the output driver for
TXCLKOUT is disabled. In applications that do
not require the output data clock, the output clock
driver should be disabled to save power.
G1, H1
TXCLKOUT+,
TXCLKOUT–
O
CML
High Speed Clock Output.
The high speed output clock, TXCLKOUT, is gen-
erated by the PLL in the clock multiplier unit. Its
frequency is nominally 16 or 64 times the
selected reference source.
Pin Number(s)
Name
I/O
Signal Level
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SI5600-BC | SiPHY-TM OC-192/STM-64 SONET/SDH TRANSCEIVER |
| SI7661 | HEATSINK TO-202 CLIP-ON .58 BK |
| SI7661DJ | HEATSINK TO-220 CLIP-ON BLK |
| SI7661CJ | CMOS Voltage Converters |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI5600-BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SiPHY-TM OC-192/STM-64 SONET/SDH TRANSCEIVER |
| SI5600M100 | 制造商:NTE Electronics 功能描述:Cap Aluminum 5600uF 100V 20% (35 X 45mm) 10mm 2000 hr 85°C Bulk |
| SI5600M16 | 制造商:NTE 制造商全稱:NTE Electronics 功能描述:SNAP-IN MOUNT ALUMINUM ELECTROLYTIC |
| SI5600M160 | 制造商:NTE 制造商全稱:NTE Electronics 功能描述:SNAP-IN MOUNT ALUMINUM ELECTROLYTIC |
| SI5600M200 | 制造商:NTE 制造商全稱:NTE Electronics 功能描述:SNAP-IN MOUNT ALUMINUM ELECTROLYTIC |
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