參數(shù)資料
型號: SI552
廠商: Silicon Laboratories Inc.
英文描述: DUAL FREQUENCY VCXO (10 MHZ TO 1.4 GHZ)
中文描述: 雙頻石英振蕩器(10 MHz至1.4 GHz)
文件頁數(shù): 7/8頁
文件大?。?/td> 180K
代理商: SI552
Si552
Preliminary Rev. 0.2
7
4. Ordering Information
The Si552 was designed to support a variety of options including frequency, tuning slope, output format, and V
DD
.
Specific device configurations are programmed into the Si552 at time of shipment. A unique part number
associated with these options and frequencies will be assigned. The Si552 Dual Frequency VCXO is provided in
an industry-standard, 7x5 package.
Part numbers for the Si552 Dual Frequency VCXO are determined by following configuration tables. Silicon Labs
provides a Windows-based part number configuration tool to simplify this process. Refer to www.silabs.com/VCXO
to access this tool and for further ordering instructions.
2
nd
Option Code (VCXO)
Temp Stability Tuning Slope
(ppm, max, ±)
(Kv,ppm/V, typ,) APR(typ)@3.3V APR(typ)@2.5V APR(typ)@1.8V
A 100 180 185 115 50
B 100 90 38 Note 3 Note 3
C 50 180 235 165 100
D 50
90 85 50 20
E 20
45 40 25 Note 3
Notes:
1. Pull range (±) = 0.5 x V
x tuning slope.
2. Absolute Pull Range (
±
APR) = Pull range – stability – lifetime aging
= 0.5xV
DD
x tuning slope – stability – 10 ppm
3. Combination not available.
APR is the ability of a VCXO to track a signal over the product lifetime . Thus, a VCXO
with an APR of 50 ppm is able to lock to a clock with 50 ppm stability, for a 15 year life.
552
X
X
1
st
Option Code
V
Output Format
LVPECL
LVDS
CMOS
A 3.3
B 3.3
C 3.3
D 3.3 CML
E 2.5
F 2.5
G 2.5
H 2.5 CML
J 1.8
K 1.8
LVPECL
LVDS
CMOS
CMOS
CML
Notes:
CMOS available to 160 MHz.
B
X
R
Tape & Reel Packaging
Operating Temp Range (°C)
G
-40 to +85°C
Part Revision Letter
552 VCXO
Product Family
DD
Frequency Designator Code
Two unique frequencies can be specified within the following bands of frequencies:
10 to 945 MHz
970 to 1134 MHz
1213 to 1417 MHz
A six digit code will be assigned by SiLabs for the specified combination of frequencies .
X X X X X X
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