(VDD = 1.8 ± 5%, 2.5 ±10%, or 3.3 V ±10%," />
參數(shù)資料
型號: SI5366-C-GQ
廠商: Silicon Laboratories Inc
文件頁數(shù): 28/32頁
文件大?。?/td> 0K
描述: IC CLOCK MULTIPLIER PREC 100TQFP
標準包裝: 90
系列: DSPLL®
類型: 時鐘放大器,振動衰減器
PLL:
輸入: 時鐘
輸出: CML,CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 4:5
差分 - 輸入:輸出: 是/是
頻率 - 最大: 1.05GHz
除法器/乘法器: 無/是
電源電壓: 1.71 V ~ 2.75 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP
供應商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
Si5366
Rev. 1.0
5
Table 2. DC Characteristics
(VDD = 1.8 ± 5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Supply Current1,6
IDD
LVPECL Format
622.08 MHz Out
All CKOUTs Enabled
394
435
mA
LVPECL Format
622.08 MHz Out
1 CKOUT Enabled
253
284
mA
CMOS Format
19.44 MHz Out
All CKOUTs Enabled
278
400
mA
CMOS Format
19.44 MHz Out
1 CKOUT Enabled
229
261
mA
Disable Mode
165
mA
CKINn Input Pins2
Input Common Mode
Voltage (Input Thresh-
old Voltage)
VICM
1.8 V ± 5%
0.9
1.4
V
2.5 V ± 10%
1
1.7
V
3.3 V ± 10%
1.1
1.95
V
Input Resistance
CKNRIN
Single-ended
20
40
60
k
Single-Ended Input
Voltage Swing
(See Absolute Specs)
VISE
fCKIN <212.5 MHz
0.2
VPP
fCKIN >212.5 MHz
0.25
VPP
Differential Input
Voltage Swing
(See Absolute Specs)
VID
fCKIN <212.5 MHz
0.2
VPP
fCKIN >212.5 MHz
0.25
VPP
Notes:
1. Current draw is independent of supply voltage
2. No under- or overshoot is allowed.
3. LVPECL outputs require nominal VDD
≥ 2.5 V.
4. This is the amount of leakage that the 3-Level inputs can tolerate from an external driver. See Si53xx Family Reference
Manual for more details.
5. LVPECL, CML, LVDS and low-swing LVDS measured with Fo = 622.08 MHz.
6. The LVPECL and CMOS output formats draw more current than either LVDS or CML; however, there are restrictions in
the allowed output format pin settings so that the maximum power dissipation for the TQFP devices is limited when they
are operated at 3.3 V. When there are four enabled LVPECL or CMOS outputs, the fifth output must be disabled. When
there are five enabled outputs, there can be no more than three outputs that are either LVPECL or CMOS.
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