![](http://datasheet.mmic.net.cn/Silicon-Laboratories-Inc/SI5350C-A-GM_datasheet_106651/SI5350C-A-GM_5.png)
Si5350C
Rev. 0.9
5
Table 3. AC Characteristics
(VDD = 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85°C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Power-Up Time
TRDY
From VDD =VDDmin to valid
output clock, CL =5pF,
fCLKn > 1 MHz
—2
10
ms
Power-Down Time
TPD
From VDD =VDDmin, CL =5pF,
fCLKn >1MHz
—5
100
ms
Output Enable Time
TOE
From OEB assertion to valid
clock output, CL = 5 pF, fCLKn
> 1 MHz
——
10
s
Output Frequency Transition
Time
TFREQ
fCLKn >1MHz
—
10
s
Spread Spectrum Frequency
Deviation
SSDEV
Down Spread
–0.5
—
–2.5
%
Spread Spectrum
Modulation Rate
SSMOD_C
30
31.5
33
kHz
Table 4. Input Characteristics
(VDD = 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Crystal Frequency
fXTAL
25
—
27
MHz
P0-P3 Input Low Voltage
VIL_P0-3
–0.1
—
0.3 x VDD
V
P0-P3 Input High Voltage
VIH_P0-3
0.7 x VDD
—3.60
V
CLKIN Frequency Range
fCLKIN
10
—
100
MHz
CLKIN Input Low Voltage
VIL_CLKIN
–0.1
—
0.3 x VDD
V
CLKIN Input High Voltage
VIH_CLKIN
0.7 x VDD
—3.60
V
Table 5. Output Characteristics
(VDD = 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Frequency Range
FCLK
0.008
—
160
MHz
Load Capacitance
CL
FCLK < 100 MHz
—
15
pF
Duty Cycle
DC
Measured at VDD/2
45
50
55
%
Rise/Fall Time
tr/tf
20%–80%, CL = 5 pF
0.5
1
1.5
ns
Output High Voltage
VOH
CL =5pF
VDD – 0.6
—
V
Output Low Voltage
VOL
——
0.6
V
Period Jitter
JPER
Measured over 10k cycles
—
60
100
ps pk-pk
Cycle-to-Cycle Jitter
JCC
Measured over 10k cycles
—
50
95
ps pk
RMS Phase Jitter
JRMS
12 kHz–20 MHz
—
5
10
ps