參數(shù)資料
型號: SI5317C-C-GM
廠商: Silicon Laboratories Inc
文件頁數(shù): 24/46頁
文件大?。?/td> 0K
描述: IC CLK JITTER CLEANR PROG 36QFN
應用說明: SI5315/17 Crystal Selection AppNote
特色產(chǎn)品: Si5317 Jitter Cleaning Clock
標準包裝: 490
系列: DSPLL®
類型: 抖動消除器
PLL: 帶旁路
輸入: 時鐘,晶體
輸出: CML,CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 200MHz
除法器/乘法器: 無/無
電源電壓: 1.71 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 36-VFQFN 裸露焊盤
供應商設備封裝: 36-QFN(6x6)
包裝: 托盤
產(chǎn)品目錄頁面: 628 (CN2011-ZH PDF)
其它名稱: 336-1921
Si5317
30
Rev. 1.1
5.1. Crystal/Reference Clock Selection
An external low-jitter clock or a low-cost crystal is used as part of a fixed-frequency oscillator within the DSPLL.
This external clock is required for the device to perform jitter attenuation. Silicon Laboratories recommends using a
high-quality crystal.
In VCO freeze, the DSPLL remains locked to this external clock. Any changes in the frequency of this clock when
the DSPLL is in VCO freeze will be tracked by the output of the device. Note that crystals can have temperature
sensitivities. See “AN591: Crystal Selection for the Si5315 and Si5317“ for a list of approved crystals for the Si5317
and guidance in their selection. AN591 can be downloaded from the Silicon Labs web site: www.silabs.com.
Because the crystal is used as a jitter reference, rapid changes of the crystal temperature can temporarily disturb
the output phase and frequency. For example, it is recommended that the crystal not be placed close to a fan that
is being turned off and on. If a situation such as this is unavoidable, the crystal should be thermally isolated with an
insulating cover.
5.1.1. XA/XB Clock Drift
During VCO freeze, long-term and temperature-related drift of the XA/XB clock input results in a one-to-one drift of
the output frequency. The stability of the any frequency output is identical to the drift of the XA/XB frequency. This
means that for the most demanding applications where the drift of a crystal is not acceptable, an external
temperature-compensated or ovenized oscillator will be required. Drift is not an issue unless the part is in VCO
freeze. Also, the initial accuracy of the XA/XB oscillator (or crystal) is not relevant.
5.1.2. XA/XB Jitter
Jitter on the XA/XB input has a roughly one-to-one transfer function to the output jitter over the bandwidth ranging
from 100 Hz up to 30 kHz. If a crystal is used on the XA/XB pins, this will have low jitter if a suitable crystal is in
use. If the XA/XB pins are connected to an external oscillator, the jitter of the external oscillator may contribute
significantly to the output jitter.
Table 13. XA/XB Reference Sources and Frequencies
RATE[1:0]
Type
Recommended
Lower limit
Upper limit
HH
Reserved
HM
Reserved
HL
Reserved
MH
External clock
114.285 MHz
109 MHz
125.5 MHz
MM
3rd overtone crystal*
114.285 MHz
ML
Reserved
LH
Reserved
LM
External clock
38.88 MHz
37 MHz
41 MHz
LL
Fundamental mode crystal*
*Note:
See “AN591: Crystal Selection for the Si5315 and Si5317.”
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