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參數(shù)資料
| 型號： | SI4122-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 36/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR SI4122 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 合成器 |
| 適用于相關(guān)產(chǎn)品： | SI4122 |
| 所含物品： | 板和光盤 |
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Si4133
Rev. 1.61
9
RF1 Harmonic Suppression
Second Harmonic
—
–26
–20
dBc
RF2 Harmonic Suppression
—
–26
–20
dBc
IF Harmonic Suppression
—
–26
–20
dBc
RFOUT Power Level
ZL = 50
–8
–3
1
dBm
RFOUT Power Level2
Z
L = 50RF1 active,
Extended frequency
operation
–14
–7
1
dBm
IFOUT Power Level
ZL = 50
–8
–4
0
dBm
RF1 Output Reference Spurs
Offset = 200 kHz
—
–65
—
dBc
Offset = 400 kHz
—
–71
—
dBc
Offset = 600 kHz
—
–75
—
dBc
RF2 Output Reference Spurs
Offset = 200 kHz
—
–65
—
dBc
Offset = 400 kHz
—
–71
—
dBc
Offset = 600 kHz
—
–75
—
dBc
Powerup Request to Synthesizer Ready3
Time
tpup
Figures 4, 5
—
40/f
50/f
Powerdown Request to Synthesizer Off4
Time
tpdn
Figures 4, 5
—
100
ns
Table 5. RF and IF Synthesizer Characteristics (Continued)
(VDD = 2.7 to 3.6 V, TA = –40 to 85 °C)
Parameter1
Symbol
Test Condition
Min
Typ
Max
Unit
Notes:
1. f = 200 kHz, RF1 = 1.6 GHz, RF2 = 1.2 GHz, IFOUT = 550 MHz, LPWR = 0, for all parameters unless otherwise noted.
2. Extended frequency operation only. VDD 3.0 V, QFN only, VCO Tuning Range fixed by directly shorting the RFLA and
RFLB pins. See Application Note 41 for more details on the Si4133 extended frequency operation.
3. From powerup request (PWDN
or SEN during a write of 1 to bits PDIB and PDRB in Register 2) to RF and IF
synthesizers ready (settled to within 0.1 ppm frequency error).
4. From powerdown request (PWDN
, or SENduring a write of 0 to bits PDIB and PDRB in Register 2) to supply current
equal to IPWDN.
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參數(shù)描述 |
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