DD = 2.7 to 3.6 V, T
參數(shù)資料
型號: SI4112-D-GTR
廠商: Silicon Laboratories Inc
文件頁數(shù): 33/36頁
文件大小: 0K
描述: IC SYNTHESIZER IF ONLY 24TSSOP
標(biāo)準(zhǔn)包裝: 2,500
類型: 頻率合成器
PLL:
輸入: 時鐘
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 1GHz
除法器/乘法器: 是/無
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
Si4133
6
Rev. 1.61
Figure 1. SCLK Timing Diagram
Table 4. Serial Interface Timing
(V
DD = 2.7 to 3.6 V, TA = –40 to 85 °C)
Parameter1
Symbol
Test Condition
Min
Typ
Max
Unit
SCLK Cycle Time
tclk
40
ns
SCLK Rise Time
tr
50
ns
SCLK Fall Time
t
f
50
ns
SCLK High Time
th
10
ns
SCLK Low Time
tl
10
ns
SDATA Setup Time to SCLK
2
t
su
5
ns
SDATA Hold Time from SCLK
2
thold
0
ns
SEN
to SCLKDelay Time2
ten1
10
ns
SCLK
to SENDelay Time2
t
en2
12
ns
SEN
to SCLKDelay Time2
ten3
12
ns
SEN Pulse Width
tw
10
ns
Notes:
1. All timing is referenced to the 50% level of the waveforms unless otherwise noted.
2. Timing is not referenced to 50% level of the waveform. See Figure 2.
SCLK
80%
20%
50%
t
r
t
f
t
l
t
clk
t
h
相關(guān)PDF資料
PDF描述
SI4112-D-GMR IC SYNTHESIZER IF ONLY 28MLP
SI5351B-A-GU IC CLK GEN PLL BLANK CUST 24QSOP
SI5351C-A-GM IC CLK GEN PLL BLANK CUST 20-QFN
VE-JTP-MZ-F1 CONVERTER MOD DC/DC 13.8V 25W
VE-BNY-MU-F3 CONVERTER MOD DC/DC 3.3V 132W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI4112-EVB 功能描述:射頻開發(fā)工具 IF Only Eval Board TSSOP RoHS:否 制造商:Taiyo Yuden 產(chǎn)品:Wireless Modules 類型:Wireless Audio 工具用于評估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V
SI4112G 制造商:SILABS 制造商全稱:SILABS 功能描述:DUAL-BAND RF SYNTHESIZER WITH INTEGRATED VCOS FOR GSM AND GPRS WIRELESS COMMUNICATIONS
SI4112G-BM 制造商:SILABS 制造商全稱:SILABS 功能描述:DUAL-BAND RF SYNTHESIZER WITH INTEGRATED VCOS FOR GSM AND GPRS WIRELESS COMMUNICATIONS
SI4112G-BT 制造商:SILABS 制造商全稱:SILABS 功能描述:DUAL-BAND RF SYNTHESIZER WITH INTEGRATED VCOS FOR GSM AND GPRS WIRELESS COMMUNICATIONS